Laurent Maillet-Contoz, STMicroelectronics
Laurent Maillet-Contoz, STMicroelectronics
Laurent Maillet-Contoz, STMicroelectronics
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Verification<br />
System TB<br />
Traffic<br />
TB<br />
Timing<br />
Analysis<br />
Bus Protocols<br />
Unicad system2RTL<br />
SLD LD Design/Verification Flow<br />
HW Design<br />
Control DSP<br />
Behavioral code generation<br />
Record<br />
TLM SOC Platform<br />
Back-annotate<br />
Behav synthesis|M2R<br />
Extract<br />
Logic MCU DSP<br />
ADC / DAC DRAM Analog<br />
Logic MCU DSP<br />
ADC / DAC DRAM Analog<br />
RTL SOC Platform<br />
RTL synthesis<br />
SystemC 2.0<br />
C/C++<br />
VHDL/Verilog<br />
SystemC<br />
eSW Design<br />
Control SW<br />
FW<br />
Verification<br />
eSW<br />
RTOS<br />
BSP<br />
LLDD<br />
Protocol stacks<br />
GUI<br />
CUSTOMER SYSTEM SPEC<br />
TLM<br />
RTL<br />
Traffic<br />
TB<br />
Embedded SW<br />
7