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Laurent Maillet-Contoz, STMicroelectronics

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IP model includes<br />

– Register bank<br />

Unicad system2RTL<br />

TLM modeling guidelines<br />

– Bit-true behavior<br />

– System synchronisation<br />

SoC simulation<br />

– Integration of IP models<br />

– Ensure correct system functional behavior by<br />

Atomic data transfers<br />

De-scheduling point after every synchronisation<br />

Implementation must de-schedule after all data transfers<br />

(a data tranfer might be an actual synchronisation)<br />

10

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