UPGRADING REPAIRING PCs
UPGRADING REPAIRING PCs UPGRADING REPAIRING PCs
42 Chapter 2—System Components and Configuration Startup and observe POST. If errors are encountered, go to defect isolation procedures. Defect Isolation Procedures. If count does not match, go to defect isolation procedures. If problems are encountered, go to Defect Isolation Procedures. If POST completes with no errors, basic functionality has been tested. Restart system, enter Bios (or CMOS) setup. Verify that memory count is equal to installed amount. While in the BIOS, set all cache options to disabled, save settings and boot to a DOS formatted (floppy) system disk. Use a diagnostics program to test system base and extended memory. If no problems are encountered, memory has tested OK. Reboot, enter BIOS setup re-enable. Figure 2.11 184-pin DDR (Double Data Rate) SDRAM DIMM. DDR DIMMs are rated for either PC200 (100MHz x 2) or PC266 (133MHz x 2) operation and normally run on 2.5 volts. They are basically an extension of the PC100 and PC133 DIMMs redesigned to support double clocking, where data is sent on each clock transition (twice per cycle) rather than once per cycle as is standard with SDRAM. Parity Versus Non-Parity Memory Parity-checked RAM uses units of 8 memory bits plus 1 parity bit, for a total of 9 bits. In addition, parity checking uses both the data bits and the parity bit to ensure that memory contents are accurate with each memory access. Virtually all 386-based and older systems, and most 486-based systems, require parity-checked memory, which can detect, but not correct, memory errors. On the other hand, most Pentium-class
and higher systems don’t require parity-checked RAM, but will ignore the parity bit(s) if present. Parity-checked memory must be used on systems that require it, and should be used on systems that can be configured to use the parity bits, especially if the systems support ECC (Error Correction Code) operation, which uses the parity bit as a means of correcting a faulty memory bit. Requirements for ECC Memory Use ECC requires the following: • Parity-checked memory modules • A motherboard chipset that offers ECC support • ECC support enabled in the BIOS system configuration ECC operation is recommended for servers and other systems that are performing mission-critical tasks because ECC operation can correct single-bit memory errors. Larger memory errors will cause the system to display an error message and halt. However, systems using ECC will cost more due to the higher cost of parity-checked RAM. Additionally, system performance is slightly slower due to the extra time involved in ECC operation. Check your motherboard or system documentation to determine whether ECC is an option for your system. To determine whether a memory module supports parity-checking or ECC, use the following tips. Using the Divide by 3 Rule to Determine Parity Support Count the chips on a SIMM or DIMM. If you can divide the number of chips by 3, the module is most likely a parity-checked module. However, some memory manufacturers have created memory modules with fake parity chips; these are referred to as logic parity modules. Note Memory Types 43 See Upgrading and Repairing PCs, 12th Edition, Chapter 6, for more information about how to detect a logic parity module. Using the Divide by 9 Rule to Determine Parity Support A similar “divide by 9” rule can also be used to determine parity checking if you know the number of memory bits in the module. Note in Table 2.16 that the number of bits in parity-checked
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42<br />
Chapter 2—System Components and Configuration<br />
Startup and<br />
observe POST.<br />
If errors are<br />
encountered,<br />
go to defect<br />
isolation<br />
procedures.<br />
Defect<br />
Isolation<br />
Procedures.<br />
If count does<br />
not match, go to<br />
defect isolation<br />
procedures.<br />
If problems are<br />
encountered, go<br />
to Defect Isolation<br />
Procedures.<br />
If POST completes<br />
with no errors,<br />
basic functionality<br />
has been tested.<br />
Restart system,<br />
enter Bios (or CMOS)<br />
setup. Verify that<br />
memory count is<br />
equal to installed<br />
amount.<br />
While in the BIOS,<br />
set all cache options<br />
to disabled, save<br />
settings and boot to<br />
a DOS formatted<br />
(floppy) system disk.<br />
Use a diagnostics<br />
program to test<br />
system base and<br />
extended memory.<br />
If no problems are<br />
encountered, memory<br />
has tested OK.<br />
Reboot, enter BIOS<br />
setup re-enable.<br />
Figure 2.11 184-pin DDR (Double Data Rate) SDRAM DIMM.<br />
DDR DIMMs are rated for either PC200 (100MHz x 2) or PC266<br />
(133MHz x 2) operation and normally run on 2.5 volts. They are<br />
basically an extension of the PC100 and PC133 DIMMs redesigned<br />
to support double clocking, where data is sent on each clock transition<br />
(twice per cycle) rather than once per cycle as is standard with<br />
SDRAM.<br />
Parity Versus Non-Parity Memory<br />
Parity-checked RAM uses units of 8 memory bits plus 1 parity bit,<br />
for a total of 9 bits. In addition, parity checking uses both the data<br />
bits and the parity bit to ensure that memory contents are accurate<br />
with each memory access.<br />
Virtually all 386-based and older systems, and most 486-based systems,<br />
require parity-checked memory, which can detect, but not<br />
correct, memory errors. On the other hand, most Pentium-class