UPGRADING REPAIRING PCs
UPGRADING REPAIRING PCs UPGRADING REPAIRING PCs
24 Chapter 2—System Components and Configuration Table 2.4 Intel-Compatible Pentium-Class Processors Internal Register Data Bus Max. Processor CPU Clock Voltage Size Width Memory AMD K5 1.5–1.75x 3.5v 32-bit 64-bit 4GB AMD K6 2.5–4.5x 2.2–3.2v 32-bit 64-bit 4GB AMD K6-2 2.5–6x 1.9–2.4v 32-bit 64-bit 4GB AMD K6-3 3.5–4.5x 1.8–2.4v 32-bit 64-bit 4GB AMD Athlon 5–10x10 (nee K7) 1.6–1.8v 32-bit 64-bit 8TB AMD Athlon, 5–10x10 with performance enhancing cache (PEC) (code name “Thunderbird”) 1.8v 32-bit 64-bit 8TB AMD Duron9 6x–7.5x10 “Thunderbird” 1.6–1.8v 32-bit 64-bit 8TB Cyrix 6x86 2x 2.5–3.5v 32-bit 64-bit 4GB Cyrix 6x86MX/MII 2–3.5x 2.2–2.9v 32-bit 64-bit 4GB VIA Cyrix III 2.5–7x 2.2v 32-bit 64-bit 4GB Nexgen Nx586 2x 4v 32-bit 64-bit 4GB IDT Winchip 3–4x 3.3–3.5v 32-bit 64-bit 4GB IDT Winchip2/2A 2.33–4x 3.3–3.5v 32-bit 64-bit 4GB Rise mP6 2–3.5x 2.8v 32-bit 64-bit 4GB FPU = Floating-Point unit (internal math coprocessor) WT = Write-through cache (caches reads only) WB = Write-back cache (caches both reads and writes) Bus = Processor external bus speed (motherboard speed) Core = Processor internal core speed (CPU speed) MMX = Multimedia extensions, 57 additional instructions for graphics and sound processing 3DNow = MMX plus 21 additional instructions for graphics and sound processing SSE = Streaming SIMD (Single Instruction Multiple Data) Extensions, MMX plus 70 additional instructions for graphics and sound processing 1. The 386SL contains an integral-cache controller, but the cache memory must be provided outside the chip. 2. Intel later marketed SL Enhanced versions of the SX, DX, and DX2 processors. These processors were available in both 5v and 3.3v versions and included power-management capabilities. 3. The Enhanced mobile PII has an on-die L2 cache similar to the Celeron.
Intel and Compatible Processor Specifications 25 L1 L2 Level 1 Cache Level 2 Cache Special Cache Type Cache Speed Features Similar to4 16+8KB WB — Bus FPU Pentium 2x32KB WB — Bus FPU, MMX Pentium MMX 2x32KB WB — Bus FPU, 3DNow Pentium MMX 2x32KB WB 256KB Core FPU, 3DNow Pentium MMX 2x64KB WB 512KB6 1/37 Core FPU, 3DNow Pentium III8 2x64KB WB 256KB Core FPU, 3DNow Pentium III 2x64KB WB 64KB Core FPU, 3DNow Athlon PEC 16KB WB — Bus FPU Pentium 64KB WB — Bus FPU, MMX Pentium MMX 64KB WB 256KB Core 2x16KB WB — Bus FPU Pentium5 2x32KB WB — Bus FPU, MMX Pentium MMX 2x32KB WB — Bus FPU, 3DNow AMD K6-2 2x8KB WB — Bus FPU, MMX Pentium MMX 4. These processors physically fit into the same Socket 7 used by Intel Pentium 75MHz and above models except as noted, but might require special chipsets or BIOS settings for best operation. Check with motherboard and chip mfr. before installing them in place of your existing Pentium-class chip. 5. Pentium-class performance, but unique, non-standard pinout. 6. Cache size for initial shipments (3rd Q 1999). Athlon designed it to allow cache sizes up to 8MB. 7. Athlon’s cache interface is designed to handle variable speed ratios, so later versions can run L2 cache more quickly. 8. Athlon uses new AMD Slot A, physically similar to Slot 1 but with a different electrical pinout. 9. Duron and “Thunderbird” versions of Athlon use new Socket A. 10. Clock Multipliers listed based on 100MHz system bus (FSB) speeds; although Athlon and Duron use 200MHz bus, memory for these systems runs at PC100 or PC133 speeds, depending on the processor model.
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- Page 13 and 14: About the Authors Scott Mueller is
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24<br />
Chapter 2—System Components and Configuration<br />
Table 2.4 Intel-Compatible Pentium-Class Processors<br />
Internal<br />
Register Data Bus Max.<br />
Processor CPU Clock Voltage Size Width Memory<br />
AMD K5 1.5–1.75x 3.5v 32-bit 64-bit 4GB<br />
AMD K6 2.5–4.5x 2.2–3.2v 32-bit 64-bit 4GB<br />
AMD K6-2 2.5–6x 1.9–2.4v 32-bit 64-bit 4GB<br />
AMD K6-3 3.5–4.5x 1.8–2.4v 32-bit 64-bit 4GB<br />
AMD Athlon 5–10x10 (nee K7)<br />
1.6–1.8v 32-bit 64-bit 8TB<br />
AMD Athlon, 5–10x10 with performance<br />
enhancing<br />
cache (PEC)<br />
(code name<br />
“Thunderbird”)<br />
1.8v 32-bit 64-bit 8TB<br />
AMD Duron9 6x–7.5x10 “Thunderbird”<br />
1.6–1.8v 32-bit 64-bit 8TB<br />
Cyrix 6x86 2x 2.5–3.5v 32-bit 64-bit 4GB<br />
Cyrix 6x86MX/MII 2–3.5x 2.2–2.9v 32-bit 64-bit 4GB<br />
VIA Cyrix III 2.5–7x 2.2v 32-bit 64-bit 4GB<br />
Nexgen Nx586 2x 4v 32-bit 64-bit 4GB<br />
IDT Winchip 3–4x 3.3–3.5v 32-bit 64-bit 4GB<br />
IDT Winchip2/2A 2.33–4x 3.3–3.5v 32-bit 64-bit 4GB<br />
Rise mP6 2–3.5x 2.8v 32-bit 64-bit 4GB<br />
FPU = Floating-Point unit (internal math coprocessor)<br />
WT = Write-through cache (caches reads only)<br />
WB = Write-back cache (caches both reads and writes)<br />
Bus = Processor external bus speed (motherboard speed)<br />
Core = Processor internal core speed (CPU speed)<br />
MMX = Multimedia extensions, 57 additional instructions for graphics and sound processing<br />
3DNow = MMX plus 21 additional instructions for graphics and sound processing<br />
SSE = Streaming SIMD (Single Instruction Multiple Data) Extensions, MMX plus 70 additional<br />
instructions for graphics and sound processing<br />
1. The 386SL contains an integral-cache controller, but the cache memory must be provided outside<br />
the chip.<br />
2. Intel later marketed SL Enhanced versions of the SX, DX, and DX2 processors. These processors<br />
were available in both 5v and 3.3v versions and included power-management capabilities.<br />
3. The Enhanced mobile PII has an on-die L2 cache similar to the Celeron.
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