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9560 Transaction Manager User's Manual - Intermec

9560 Transaction Manager User's Manual - Intermec

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Data Communications and Operating Options<br />

5<br />

Asynchronous protocols at this level perform error detection. For synchronous<br />

protocols, this layer detects starting and ending flags and generates a cyclical<br />

redundancy check (CRC). This layer also identifies whether the transmission<br />

channel is dedicated (point-to-point) or shared (multipoint), and if transmission<br />

is full- or half-duplex.<br />

Full-Duplex Protocols Versus Half-Duplex Protocols<br />

At the data link layer, protocols are described as either full-duplex or halfduplex.<br />

A full-duplex protocol allows messages to be received and transmitted<br />

simultaneously. Your system must have separate, dedicated channels for<br />

receiving and transmitting data to use a full-duplex protocol. Also, the host<br />

and reader must have the necessary hardware (interrupt structure) to support<br />

receiving and transmitting data simultaneously. You define a full-duplex<br />

protocol by disabling both the solicitation sequence (Poll and Select) and<br />

AFF/NEG handshakes.<br />

Point-to-Point and similar user-defined protocols are the only <strong>Intermec</strong><br />

protocols that are full-duplex. These protocols do not support retransmission of<br />

data messages. The reader transmits data when commanded to by the<br />

operator, but the reader receives data from the host at any time.<br />

A half-duplex protocol requires that only one device transmit data at a time<br />

over a shared or dedicated channel. You can use a half-duplex protocol over a<br />

full-duplex medium, but only one device at a time can transmit data. You<br />

define a half-duplex protocol by defining either the POL character or the<br />

AFF character.<br />

Full-Duplex Devices Versus Half-Duplex Devices<br />

Devices are full-duplex or half-duplex depending on their ability to receive and<br />

transmit data simultaneously. Both hardware and software design determine if<br />

a device is full or half-duplex. A full-duplex design requires a hardware UART<br />

(universal asynchronous receiver/transmitter) with double-buffered transmit<br />

and receive buffers. The UART signals the CPU when a character is received or<br />

when the transmit buffer is ready for another character. The software must<br />

perform the transmit or receive functions when the UART signals the CPU<br />

with an interrupt.<br />

The DLE Character and XON/XOFF Flow Control<br />

You use the DLE (data link escape) character to send protocol commands or<br />

parameters that you want to be treated as data. The DLE must precede the<br />

transparent command or parameter. The following protocol parameters are<br />

considered transparent if DLE is enabled: RES, REQ, SOM, TX EOM1,<br />

TX EOM2, and XON/XOFF.<br />

You can send the DLE, EOR (end of record), and EOF (end of file) characters as<br />

data if each is preceded by an DLE.<br />

5-5

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