DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...
DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ... DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...
Star Topology: The 1 – Wire® bus is split at or near the master end and extends in multiple branches of varying lengths. There are slave devices along, or at the ends of, the branches. Figure 2.18 shows an example of a star topology 1 – Wire® network. Figure 2.18 Star Network Topology. When different topologies are intermixed, it becomes much more difficult to determine the effective limitations for the 1 – Wire® network. As a rule, the designer should apply the most conservative of the criteria in these cases. Unswitched star topologies (i.e. those with several branches diverging at the master) are the most difficult to make reliable. The junction of the various branches presents highly mismatched impedances; reflections from the end of one branch can travel distances equal to nearly the weight of the network and cause data errors. 37
2.5.3 1 – Wire® Network Limitations Several factors determine the maximum radius and weight of a network. Some of these factors can be controlled and some cannot. The master-end interface greatly influences the allowable size of a 1 – Wire® network. This interface must provide sufficient drive current to overcome the weight of the cable and slaves. The master-end interface must also generate the 1 – Wire® waveform with timing that is within specification and optimized for the charge and discharge times of the network. Finally, the interface must provide a suitable impedance match to the network, so that signals are not reflected back down the line to interfere with other network slaves. When the network is very small, very simple master-end interfaces are acceptable. Capacitance is low, reflected energies arrive too soon to pose a problem, and cable losses are minimal. A simple active FET pulldown and passive resistor pullup are sufficient. However, when cable lines lengthen and more slave devices are connected, complex signal interactions come into play. This requires the master-end interface to be properly designed to handle these complex signal characteristics. The network radius is limited by several factors: the timing of waveform reflections, the time delay produced by the cable, the resistance of the cable, and the degradation of signal levels. Network weight is limited by the ability of the cable to be charged and discharged quickly enough to satisfy the 1 – Wire® protocol. A simple pullup resistor has a weight limitation of about 200m. Sophisticated 1 – Wire® Master designs have overcome this limitation by using active pullups, that provide higher currents under logic control and have extended the maximum supportable weight to over 500m. 38
- Page 11 and 12: ACKNOWLEDGEMENTS I would like to ex
- Page 13 and 14: 2.4 Types of Devices...............
- Page 15 and 16: 4.3.5 Communication Speed Different
- Page 17 and 18: 5.3.21.1 Synchronization Test (test
- Page 19 and 20: 5.3 Resource Utilization...........
- Page 21 and 22: LIST OF FIGURES 2.1 1 - Wire® Netw
- Page 23 and 24: 4.12 Read-Data Time Slot...........
- Page 25 and 26: 6.4 DS1996 Address Registers ......
- Page 27 and 28: manufacturing process. Structured o
- Page 29 and 30: describes the 1 - Wire® and CAN co
- Page 31 and 32: 2.2 1 - Wire® Overview The basis o
- Page 33 and 34: All 1 - Wire® masters described in
- Page 35 and 36: attachments, microcontroller with b
- Page 37 and 38: Figure 2.3 Bidirectional port pin w
- Page 39 and 40: 2.3.3 Synthesizable 1 - Wire® Bus
- Page 41 and 42: Figure 2.7 UART/RS232 Serial Port I
- Page 43 and 44: hardware. Through control registers
- Page 45 and 46: Table 2.2 1 - Wire® Bus Operations
- Page 47 and 48: 2.3.6 1 - Wire® Search Algorithm F
- Page 49 and 50: detected. This ‘read two bits’
- Page 51 and 52: in Figure 2.15. Alternatively, the
- Page 53 and 54: of the bit, then write the desired
- Page 55 and 56: 2.4.2 Device Functions and Typical
- Page 57 and 58: and development (R&D) investments b
- Page 59 and 60: 2.5 Network Types and Precedents As
- Page 61: 2.5.2 1 - Wire® Network Topologies
- Page 65 and 66: with a single selected slave. If an
- Page 67 and 68: user group was founded in March of
- Page 69 and 70: protocol on multiple media for maxi
- Page 71 and 72: ecessive bit and the monitored stat
- Page 73 and 74: specification: Start-Of-Frame, Arbi
- Page 75 and 76: Cyclic Redundancy Check (CRC) Field
- Page 77 and 78: Arbitration FieldThe Arbitration Fi
- Page 79 and 80: SOF SOF Bit 28 Bit 27 Arbitration f
- Page 81 and 82: Afterwards it starts transmitting s
- Page 83 and 84: Figure 3.9 Structure of the Interfr
- Page 85 and 86: error occurs, an Error Frame is gen
- Page 87 and 88: Table 3.4 Error Flag Output Timing
- Page 89 and 90: 3.5.2 Error-Passive A node becomes
- Page 91 and 92: where tNBT is the Nominal Bit Time
- Page 93 and 94: Figure 3.12 Propagation Delay Betwe
- Page 95 and 96: 3.6.4 Synchronization t t t t (3.
- Page 97 and 98: opposite value is inserted into the
- Page 99 and 100: many systems, the bus length will b
- Page 101 and 102: CHAPTER 4 THE CHALLENGES OF INTERFA
- Page 103 and 104: In June 2004, Maxim Integrated Prod
- Page 105 and 106: Wearable sensor technology is a new
- Page 107 and 108: In traditional bus architectures, o
- Page 109 and 110: Figure 4.3 Centralized arbiter with
- Page 111 and 112: For the initial prototype design pr
Star Topology: The 1 – Wire® bus is split at or near the master end and extends in multiple<br />
branches of varying lengths. There are slave devices along, or at the ends of, the branches.<br />
Figure 2.18 shows an example of a star topology 1 – Wire® network.<br />
Figure 2.18 Star Network Topology.<br />
When different topologies are intermixed, it becomes much more difficult to determine<br />
the effective limitations for the 1 – Wire® network. As a rule, the designer should apply the<br />
most conservative of the criteria in these cases. Unswitched star topologies (i.e. those with<br />
several branches diverging at the master) are the most difficult to make reliable. The junction of<br />
the various branches presents highly mismatched impedances; reflections from the end of one<br />
branch can travel distances equal to nearly the weight of the network and cause data errors.<br />
37
Change language