DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...
DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ... DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...
participating. The alarm or conditional search command (0xEC) will perform a search with only the devices that are in some sort of alarm state. This reduces the search pool to quickly respond to devices that need attention. Figure 2.14 64 – Bit Unique ROM ‘Registration’ Number. Following the search command, the actual search begins with all of the participating devices simultaneously sending the first bit (least significant) in their ROM number as shown in Figure 2.14. As with all 1 – Wire® communication, the 1 – Wire® Master initiates every bit whether it is data to be read or written to the slave devices. Due to the characteristics of the 1 – Wire® bus, when all devices respond at the same time, the result will be a logical AND of the bits sent. After the devices send the first bit of the ROM number, the master initiates the next bit and the devices then send the complement of the first bit. From these two bits, information can be derived about the first bit in the ROM numbers of the participating devices. This information is summarized in Table 2.3. Table 2.3 1 – Wire® Bit Search Information. Bit (true) Bit (complement) Information Known 0 0 There are both 0s and 1s in the current bit position of the participating ROM numbers. This is a discrepancy. 0 1 There are only 0s in the bit of the participating ROM numbers. 1 0 There are only 1s in the bit of the participating ROM numbers. 1 1 No devices participating in search. Next, according to the search algorithm, the 1 – Wire® Master must then send a bit back to the participating devices. If a participating device has that bit value, it continues participating. If it does not have the bit value, it goes into a wait state until the next 1 – Wire® reset is 23
detected. This ‘read two bits’ and ‘write one bit’ pattern, from the perspective of the Master, is then repeated for the remaining 63 bits of the ROM number (see Table 2.4). In this way the search algorithm forces all but one device to go into this wait state. At the end of one pass, the ROM number of this last participating device is known. On subsequent passes of the search, a different path is taken to find the other device ROM numbers. Table 2.4 1 – Wire® Master and Slave Search Sequence. Master Slave 1 – Wire® reset stimulus Produce presence pulse. Write search command (normal or alarm) Each slave readies for search Read ‘AND’ of bit 1 Each slave sends bit 1 of its ROM number. Read ‘AND’ of complement of bit 1 Each slave sends complement of bit 1 of its ROM number. Each participating slave receives the bit written by master, if bit Write bit 1 direction (according to algorithm) read is not the same as bit 1 of its ROM number then go into a wait state. Read ‘AND’ of bit 64 Each slave sends bit 64 of its ROM number. Read ‘AND’ of complement of bit 64 Each slave sends complement bit 64 of its ROM number. Write bit 64 direction (according to algorithm) Each participating slave receives the bit written by master, if bit read is not the same as bit 64 of its ROM number then go into a wait state. On examination of Table 2.3, it is obvious that if all of the participating devices have the same value in a bit position then there is only one choice for the branch path to be taken. The condition where no devices are participating is an atypical situation that may arise if the device being discovered is removed from the 1 – Wire® bus during the search. If this situation arises then the search should be terminated and a new search started with a 1 – Wire® reset. The condition where there are both 0s and 1s in the current bit position is called a discrepancy and is the key to finding devices in the subsequent searches. The search algorithm specifies that on the first pass, when there is a discrepancy (bit/complement = 0/0), the ‘0’ path is taken. The bit position for the last discrepancy is recorded for use in the next search [16]. Table 2.5 describes the paths taken on subsequent searches when a discrepancy occurs. 24
- Page 1 and 2: DESIGN OF A CUSTOM ASIC INCORPORATI
- Page 3 and 4: ABSTRACT The vast majority of today
- Page 5 and 6: LIST OF ABBREVIATIONS AND SYMBOLS A
- Page 7 and 8: ISO International Organization for
- Page 9 and 10: SI Serial In SO Serial Out SOF Star
- Page 11 and 12: ACKNOWLEDGEMENTS I would like to ex
- Page 13 and 14: 2.4 Types of Devices...............
- Page 15 and 16: 4.3.5 Communication Speed Different
- Page 17 and 18: 5.3.21.1 Synchronization Test (test
- Page 19 and 20: 5.3 Resource Utilization...........
- Page 21 and 22: LIST OF FIGURES 2.1 1 - Wire® Netw
- Page 23 and 24: 4.12 Read-Data Time Slot...........
- Page 25 and 26: 6.4 DS1996 Address Registers ......
- Page 27 and 28: manufacturing process. Structured o
- Page 29 and 30: describes the 1 - Wire® and CAN co
- Page 31 and 32: 2.2 1 - Wire® Overview The basis o
- Page 33 and 34: All 1 - Wire® masters described in
- Page 35 and 36: attachments, microcontroller with b
- Page 37 and 38: Figure 2.3 Bidirectional port pin w
- Page 39 and 40: 2.3.3 Synthesizable 1 - Wire® Bus
- Page 41 and 42: Figure 2.7 UART/RS232 Serial Port I
- Page 43 and 44: hardware. Through control registers
- Page 45 and 46: Table 2.2 1 - Wire® Bus Operations
- Page 47: 2.3.6 1 - Wire® Search Algorithm F
- Page 51 and 52: in Figure 2.15. Alternatively, the
- Page 53 and 54: of the bit, then write the desired
- Page 55 and 56: 2.4.2 Device Functions and Typical
- Page 57 and 58: and development (R&D) investments b
- Page 59 and 60: 2.5 Network Types and Precedents As
- Page 61 and 62: 2.5.2 1 - Wire® Network Topologies
- Page 63 and 64: 2.5.3 1 - Wire® Network Limitation
- Page 65 and 66: with a single selected slave. If an
- Page 67 and 68: user group was founded in March of
- Page 69 and 70: protocol on multiple media for maxi
- Page 71 and 72: ecessive bit and the monitored stat
- Page 73 and 74: specification: Start-Of-Frame, Arbi
- Page 75 and 76: Cyclic Redundancy Check (CRC) Field
- Page 77 and 78: Arbitration FieldThe Arbitration Fi
- Page 79 and 80: SOF SOF Bit 28 Bit 27 Arbitration f
- Page 81 and 82: Afterwards it starts transmitting s
- Page 83 and 84: Figure 3.9 Structure of the Interfr
- Page 85 and 86: error occurs, an Error Frame is gen
- Page 87 and 88: Table 3.4 Error Flag Output Timing
- Page 89 and 90: 3.5.2 Error-Passive A node becomes
- Page 91 and 92: where tNBT is the Nominal Bit Time
- Page 93 and 94: Figure 3.12 Propagation Delay Betwe
- Page 95 and 96: 3.6.4 Synchronization t t t t (3.
- Page 97 and 98: opposite value is inserted into the
participating. The alarm or conditional search command (0xEC) will perform a search with only<br />
the devices that are in some sort of alarm state. This reduces the search pool to quickly respond<br />
to devices that need attention.<br />
Figure 2.14 64 – Bit Unique ROM ‘Registration’ Number.<br />
Following the search command, the actual search begins with all of the participating<br />
devices simultaneously sending the first bit (least significant) in their ROM number as shown in<br />
Figure 2.14. As with all 1 – Wire® communication, the 1 – Wire® Master initiates every bit<br />
whether it is data to be read or written to the slave devices. Due to the characteristics of the 1 –<br />
Wire® bus, when all devices respond at the same time, the result will be a logical <strong>AND</strong> of the<br />
bits sent. After the devices send the first bit of the ROM number, the master initiates the next bit<br />
and the devices then send the complement of the first bit. From these two bits, information can<br />
be derived about the first bit in the ROM numbers of the participating devices. This information<br />
is summarized in Table 2.3.<br />
Table 2.3 1 – Wire® Bit Search Information.<br />
Bit (true) Bit (complement) Information Known<br />
0 0<br />
There are both 0s and 1s in the current bit position of the<br />
participating ROM numbers. This is a discrepancy.<br />
0 1 There are only 0s in the bit of the participating ROM numbers.<br />
1 0 There are only 1s in the bit of the participating ROM numbers.<br />
1 1 No devices participating in search.<br />
Next, according to the search algorithm, the 1 – Wire® Master must then send a bit back<br />
to the participating devices. If a participating device has that bit value, it continues participating.<br />
If it does not have the bit value, it goes into a wait state until the next 1 – Wire® reset is<br />
23
Change language