15.08.2013 Views

DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...

DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...

DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

Figure 2.7 UART/RS232 Serial Port Interface [8].<br />

For those applications that already use an I 2 C [9] bus, the implementation in Figure 2.8 is<br />

most convenient to establish a 1 – Wire® Master. This design makes use of an existing I 2 C bus<br />

controller, such as a microcontroller, or <strong>ASIC</strong>/FPGA, and some spare space in the program<br />

memory. The advantages to this implementation are its relatively low cost for the features<br />

provided, and the fact that the 1 – Wire® timing is generated by hardware. The DS2482<br />

supports a strong pullup as well as an active pullup. On the downside, the DS2482 cannot drive<br />

as many 1 – Wire® slave devices as the DS2490 or DS2480B. The single-channel version, the<br />

DS2482-100 as shown in Figure 2.8, has a control output for an additional strong pullup (Q1)<br />

circuit as shown in Figures 2.3 through 2.6 [13 – 15].<br />

16

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!