DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...

2.2 1 – Wire® Overview
The basis of 1 – Wire® technology is a serial protocol using a single data line plus
ground reference for communication. Note that by convention the ground or reference wire is
not normally counted [5]. The 1 – Wire® bus uses a simple signaling scheme that performs two-
way communications with peripheral devices over a single electrical connection. This scheme
provides the end user with a low-cost bus driven by a PC or microcontroller (master)
communicating digitally over twisted-pair cable with 1 – Wire® components. The network is
defined with an open-drain master/slave multidrop architecture that uses a resistor pull-up to a
nominal 5V supply at the master. The 1 – Wire® protocol uses conventional CMOS/TTL
(Complementary Metal-Oxide Semiconductor/Transistor-Transistor Logic) logic levels
(maximum 0.8V for logic “zero” and a minimum 2.2V for a logic “one”) with operation
specified over a supply voltage range of 2.8V to 6V [6]. Data transfers are half-duplex and bit
sequential over a single wire, from which the slaves steal power by means of an internal diode
half-wave rectifier and capacitor. Most 1 – Wire® devices support two data rates. The lower
(standard) data rate is approximately 14 kbps and the higher (overdrive) data rate is
approximately 140 kbps. However, an even higher data rate of 1Mbps is currently in
development [7]. Since the protocol is self-clocking and tolerant to long inter-bit delays, this
makes for easy operation in input/output (I/O) intensive environments.
There are several terms often used to describe the operation and components of a 1 –
Wire® network. These are not limited to but include the following: Host Interface, Strong
Pullup, 1 – Wire® Timing, Overdrive Support, and Active Pullup.
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