DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...

system configuration used for this test. In addition two CAN nodes are utilized, whose
addresses are set to 1 and 2, respectively. The custom interface on the FPGA handles all
conversions from CAN messages to 1 – Wire® commands. Each CAN node is
automatically performing an A/D conversion (voltage divider circuit from a potentiometer)
approximately every 500 ms and transmitting this data on the CAN bus to the DS1996 1 –
Wire® devices. In addition to the data byte containing the A/D conversion result, both CAN
nodes are programmed to also send an I/O status byte, which includes the status of both the
Digital Inputs and Digital Outputs. So to summarize, approximately every 500 ms, eight data
bytes are being transmitted on the CAN bus to the DS1996 1 – Wire® devices. Two of these
data bytes represent the transmitting node number and the other two represent the A/D
conversion result and Digital I/O status bytes, respectively (i.e., node number + A/D conversion
result and node number + Digital I/O status). The results of this test are presented in Table 6.2.
Table 6.2 Test Results.
1 – Wire®
Devices
Type #
# of CAN
Nodes
CAN Bus
Speed (kbps)
1 – Wire® Bus
Speed (kbps)
Hot-Swapped
(1 – Wire®)
Length of Test
(min)
Failures
DS1996 3 2 10 14 Yes 60 No
DS1996 3 2 10 140 Yes 18 Yes 1
DS1996 3 2 125 14 Yes 60 No
DS1996 3 2 125 140 Yes 14 Yes 1
1
This failure resulted in loss of messages to 1 – Wire® devices from the CAN bus.
From Table 6.2, lost CAN bus messages are noted when running the 1 – Wire® bus in
overdrive speed. After many hours of repeating these two tests and many lines of debug code, it
was found that if a CAN bus message came in while running the 1 – Wire® bus in overdrive
and the devices were not all operating in overdrive speed yet, the present CAN bus message
was dropped. Although, technically this is not a failure in the sense of a catastrophic event, it is
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