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DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...

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CHAPTER 6<br />

1 – WIRE® <strong>AND</strong> CAN COMBINED SYSTEM PROTOTYPE IMPLEMENTATION<br />

6.1 Overview of Integrated System<br />

The fully integrated prototype system presented here consists of the following: a<br />

synthesizable 1 – Wire® Bus Master and a synthesizable CAN Controller implemented on the<br />

Altera DE2 board; multiple CAN nodes using the design specified in Section 5.3.20; and<br />

multiple 1 – Wire® slave devices. The complete prototype system is shown in Figure 6.1. The 1<br />

– Wire® slave devices shown in Figure 6.1 are samples obtained through Maxim<br />

Semiconductor. The CAN nodes shown in Figure 6.1 are based on Microchip application note<br />

AN215 [47]. Table 6.1 shows FPGA resource utilization by the Altera DE2 Development and<br />

Education board for the prototype CAN Controller and 1 – Wire® Master.<br />

Figure 6.1 Combined CAN & 1 – Wire® Prototype System.<br />

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