DESIGN OF A CUSTOM ASIC INCORPORATING CAN™ AND 1 ...

Table 5.19 Resource Utilization.
Revision Name CAN_Controller
Family Cyclone II
Device EP2C35F672C6
Timing Models Final
Met timing requirements Yes
Total logic elements 1560 / 33,216 ( 1 % )
Total combinational functions 1462 / 33,216 ( 1 % )
Dedicated logic registers 625 / 33,216 ( < 1 % )
Total registers 625
Total pins 19 / 475 ( 4 % )
Total virtual pins 0
Total memory bits 832 / 483,840 ( 0 % )
Embedded Multiplier 9-bit element 0 / 70 ( 0 % )
Total PLLs 0 / 4 ( 0 % )
5.3.21.1 Synchronization Test (test_synchronization)
All nodes on a CAN bus must have the same NBT. Since the CAN protocol is an
asynchronous serial bus with Non-Return to Zero (NRZ) bit coding; a clock is not encoded into
each message. The receivers must synchronize to the transmitted data stream to insure messages
are properly decoded. There are two methods used for achieving and maintaining
synchronization: hard synchronization and re-synchronization (Sections 3.6.4 – 3.6.5).
When synchronizing, there are five basic rules to follow to synchronize the receivers with
the transmitted data:
Only recessive-to-dominant edges will be used for synchronization.
Only one synchronization within one bit time is allowed.
An edge will be used for synchronization only if the value at the previous sample
point differs from the bus value immediately after the edge.
182