Xilinx CPLD Libraries Guide

OBUFT
Primitive: 3-State Output Buffer with Active Low Output Enable
Supported Architectures
This design element is supported in the following architectures only:
• XC9500XL
• CoolRunner XPLA3
• CoolRunner-II
Introduction
About Design Elements
This design element is a single, 3-state output buffer with input I, output O, and active-Low output enables (T).
This element uses the LVTTL standard and has selectable drive and slew rates using the DRIVE and SLOW or
FAST constraints. The defaults are DRIVE=12 mA and SLOW slew.
When T is Low, data on the inputs of the buffers is transferred to the corresponding outputs. When T is High, the
output is high impedance (off or Z state). OBUFTs are generally used when a single-ended output is needed
with a 3-state capability, such as the case when building bidirectional I/O.
Logic Table
Inputs Outputs
T I O
1 X Z
0 I F
Port Descriptions
Name Direction Width Function
O Output 1-Bit Buffer output (connect directly to top-level port)
I Input 1-Bit Buffer input
T Input 1-Bit 3-state enable input
Design Entry Method
Instantiation Yes
Inference Recommended
Coregen and wizards No
Macro support No
This design element can be used in schematics.
CPLD Libraries Guide
506 www.xilinx.com ISE 10.1