Xilinx CPLD Libraries Guide

NOR2
Primitive: 2-Input NOR Gate with Non-Inverted Inputs
Supported Architectures
This design element is supported in the following architectures only:
• XC9500XL
• CoolRunner XPLA3
• CoolRunner-II
Introduction
About Design Elements
NOR gates of up to five inputs are available in any combination of inverting and non-inverting inputs. NOR
gates of six to nine inputs, 12 inputs, and 16 inputs are available only with non-inverting inputs. To invert some
or all inputs, use external inverters. Because each input uses a CLB resource, replace gates with unused inputs
with gates having the necessary number of inputs.
Design Entry Method
This design element is only for use in schematics.
For More Information
• See the appropriate CPLD User Guide.
• See the appropriate CPLD Data Sheets.
CPLD Libraries Guide
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