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Xilinx CPLD Libraries Guide

Xilinx CPLD Libraries Guide

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INV<br />

Primitive: Inverter<br />

Supported Architectures<br />

This design element is supported in the following architectures only:<br />

• XC9500XL<br />

• CoolRunner XPLA3<br />

• CoolRunner-II<br />

Introduction<br />

This design element is a single inverter that identifies signal inversions in a schematic.<br />

Design Entry Method<br />

This design element is only for use in schematics.<br />

For More Information<br />

• See the appropriate <strong>CPLD</strong> User <strong>Guide</strong>.<br />

• See the appropriate <strong>CPLD</strong> Data Sheets.<br />

About Design Elements<br />

<strong>CPLD</strong> <strong>Libraries</strong> <strong>Guide</strong><br />

418 www.xilinx.com ISE 10.1

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