Xilinx CPLD Libraries Guide

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COMPM2 Macro: 2-Bit Magnitude Comparator Supported Architectures This design element is supported in the following architectures only: • XC9500XL • CoolRunner XPLA3 • CoolRunner-II Introduction About Design Elements This design element is a 2-bit magnitude comparator that compare two positive Binary-weighted words. It compares A1 – A0 and B1 – B0, where A1 and B1 are the most significant bits. The greater-than output (GT) is High when A > B, and the less-than output (LT) is High when A < B When the two words are equal, both GT and LT are Low. Equality can be measured with this macro by comparing both outputs with a NOR gate. Logic Table Inputs Outputs A1 B1 A0 B0 GT LT 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 0 1 0 1 1 0 1 0 1 1 1 1 1 0 0 1 0 X X 1 0 0 1 X X 0 1 Design Entry Method This design element is only for use in schematics. For More Information • See the appropriate CPLD User Guide. • See the appropriate CPLD Data Sheets. CPLD Libraries Guide 292 www.xilinx.com ISE 10.1
About Design Elements COMPM4 Macro: 4-Bit Magnitude Comparator Supported Architectures This design element is supported in the following architectures only: • XC9500XL • CoolRunner XPLA3 • CoolRunner-II Introduction This design element is a 4-bit magnitude comparator that compare two positive Binary-weighted words. It compares A3 – A0 and B3 – B0, where A3 and B3 are the most significant bits. The greater-than output (GT) is High when A > B, and the less-than output (LT) is High when A < B When the two words are equal, both GT and LT are Low. Equality can be measured with this macro by comparing both outputs with a NOR gate. Logic Table Inputs Outputs A3, B3 A2, B2 A1, B1 A0, B0 GT LT A3>B3 X X X 1 0 A3B2 X X 1 0 A3=B3 A2B1 X 1 0 A3=B3 A2=B2 A1B0 1 0 A3=B3 A2=B2 A1=B1 A0
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ISE 10.1 CPLD Libraries Guide
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Table of Contents About this Guide.
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About this Guide This guide is part
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Design Element Description BUFE4 Ma
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Design Element Description Function
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Design Element Description OBUFT Pr
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Design Element Description NOR3B2 P
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About Design Elements This section
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About Design Elements For More Info
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About Design Elements B0 for ACC16)
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About Design Elements • For twos-
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About Design Elements B0 for ACC8)
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About Design Elements ADD16 Macro:
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About Design Elements ADD4 Macro: 4
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About Design Elements AND6 Macro: 6
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About Design Elements BRLSHFT4 Macr
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About Design Elements BUF16 Macro:
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About Design Elements BUFT16 Macro:
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About Design Elements Design Entry
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About Design Elements Inputs Output
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About Design Elements Logic Table I
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About Design Elements CLK_DIV10 Pri
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About Design Elements CLK_DIV10RSD
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About Design Elements CLK_DIV12RSD
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About Design Elements CLK_DIV12SD P
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About Design Elements FDPE Primitiv
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About Design Elements INV16 Macro:
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About Design Elements Verilog Insta
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About Design Elements LDC Macro: Tr
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About Design Elements LDCP Primitiv
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About Design Elements LDG Primitive
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About Design Elements LDG4 Macro: 4
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About Design Elements LDP Macro: Tr
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About Design Elements OR2B1 Primiti
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