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Xilinx CPLD Libraries Guide

Xilinx CPLD Libraries Guide

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About Design Elements<br />

COMP4<br />

Macro: 4-Bit Identity Comparator<br />

Supported Architectures<br />

This design element is supported in the following architectures only:<br />

• XC9500XL<br />

• CoolRunner XPLA3<br />

• CoolRunner-II<br />

Introduction<br />

This design element is a 4-bit identity comparator. The equal output (EQ) is high when A3 – A0 and B3 –<br />

B0 are equal.<br />

Equality is determined by a bit comparison of the two words. When any two of the corresponding bits from<br />

each word are not the same, the EQ output is Low.<br />

Design Entry Method<br />

This design element is only for use in schematics.<br />

For More Information<br />

• See the appropriate <strong>CPLD</strong> User <strong>Guide</strong>.<br />

• See the appropriate <strong>CPLD</strong> Data Sheets.<br />

<strong>CPLD</strong> <strong>Libraries</strong> <strong>Guide</strong><br />

ISE 10.1 www.xilinx.com 289

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