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Xilinx CPLD Libraries Guide

Xilinx CPLD Libraries Guide

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About Design Elements<br />

This section describes the design elements that can be used with this architecture. The design elements are<br />

organized alphabetically.<br />

The following information is provided for each design element, where applicable:<br />

• Name of element<br />

• Brief description<br />

• Schematic symbol (if any)<br />

• Logic Table (if any)<br />

• Port Descriptions (if any)<br />

• Usage<br />

• Available Attributes (if any)<br />

• For more information<br />

You can find examples of VHDL and Verilog instantiation code in the ISE software (in the main menu, select Edit<br />

> Language Templates or in the <strong>Libraries</strong> <strong>Guide</strong> for HDL Designs for this architecture.<br />

<strong>CPLD</strong> <strong>Libraries</strong> <strong>Guide</strong><br />

ISE 10.1 www.xilinx.com 19

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