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III. Gm-C Filtering - Epublications - Université de Limoges

III. Gm-C Filtering - Epublications - Université de Limoges

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V.3 State-of-the-Art<br />

V.3.a 4-path <strong>Filtering</strong> State-of-the-Art<br />

References [V.3 and V.5] report measurement results of very high RF performances<br />

using the structure in Figure 185, with NF below 5dB with IIP3 higher than 14dBm, for a Q<br />

factor between 3 and 29. However, due to aliasing, maximum rejection is limited to 15dB.<br />

The results in this paper are summarized in Table 31. It is worth highlighting that an external<br />

balun is used for the single to differential conversion. In this table, the maximum rejection is<br />

<strong>de</strong>fined by the difference between the gain at fclk and the gain between two folding<br />

frequencies.<br />

Table 31. Sum-up of 4-path filter performances<br />

- 167 -<br />

[V.5] Units<br />

f0 Tuning Range 100 – 1000 MHz<br />

Q-factor 3 to 29 (BW=35MHz) -<br />

Filter Gain at f0 -2 dB<br />

Maximum rejection 15 dB<br />

NF 3 to 5 dB<br />

In-band IIP3 14 to 21 dBm<br />

P1dB 2 dBm<br />

Consumption 2 to 16 mW<br />

Active area 0.07 mm 2<br />

Technology 65nm CMOS -<br />

V.3.b An Innovative Fully-integrated Architecture<br />

As explained in these papers, “most integrated receivers nowadays are zero or low-IF<br />

(Figure 192.a), and benefit from a simple structure and a high level of integration as image<br />

rejection is not a major concern, and channel selection is performed by low-frequency lowpass<br />

filters”. However, these filters consist of RC networks which do not scale with the<br />

technology. Besi<strong>de</strong>s “constraints such as 1/f noise or second or<strong>de</strong>r non-linearity <strong>de</strong>mand large<br />

<strong>de</strong>vice sizes for the IF blocks, exacerbating the scalability issue” [V.7]. A superheterodyne<br />

architecture does not experience these issues since it uses IF but it requires external filters for<br />

image rejection and channel selection, as illustrated in Figure 192.b.<br />

To circumvent the scalability issue of zero or low-IF architectures and to achieve the<br />

same level of integration, references [V.6] and [V.7] propose an architecture with a high IF<br />

(110MHz), similar to a superheterodyne receiver, where image and blockers are progressively<br />

filtered throughout the receiver chain by means of frequency-translated filters <strong>de</strong>rived from<br />

the original N-path filtering concept. This may be observed in Figure 192.c.

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