III. Gm-C Filtering - Epublications - Université de Limoges

V.2.b Selectivity and Main Parameters
For first simulations, switches size is 100/0.06 and capacitors are 66pF, as described in
[V.5]. Clock frequency fclk is 250MHz and the differential output signal, which exhibits a
quality factor of 5, is plotted versus frequency in Figure 187.
fclk
3fclk
5fclk
Figure 187. Output signal versus frequency with fclk=250MHz
As expected, the closest folding appears at 3×250=750MHz and higher frequency
foldings are located at odd multiples of the clock frequency.
Maximum rejection is 19dB for a -3dB gain at the central frequency. In the literature,
it is demonstrated that maximum rejection is limited by the Ron switch resistance which has to
be very small with respect to source resistance R. Larger switch size than 100/0.06 can then
be used to enhance maximum rejection as it may be observed in Figure 188. However, this
means larger parasitic capacitors, which affect the tuning range and clock leakage, and also
require more clock power to drive the switches [V.5].
Figure 188. Enhancement of the maximum rejection reducing the Ron of the switches
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7fclk
9fclk 11fclk