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MCP23008/MCP23S08 - Microchip

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1.6.8 INTERRUPT FLAG (INTF)<br />

REGISTER<br />

The INTF register reflects the interrupt condition on the<br />

port pins of any pin that is enabled for interrupts via the<br />

GPINTEN register. A ‘set’ bit indicates that the<br />

associated pin caused the interrupt.<br />

This register is ‘read-only’. Writes to this register will be<br />

ignored.<br />

REGISTER 1-8: INTF – INTERRUPT FLAG REGISTER (ADDR 0x07)<br />

<strong>MCP23008</strong>/<strong>MCP23S08</strong><br />

Note: INTF will always reflect the pin(s) that<br />

have an interrupt condition. For example,<br />

one pin causes an interrupt to occur and is<br />

captured in INTCAP and INF. If before<br />

clearing the interrupt another pin changes,<br />

which would normally cause an interrupt, it<br />

will be reflected in INTF, but not INTCAP.<br />

R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0<br />

INT7 INT6 INT5 INT4 INT3 INT2 INT1 INT0<br />

bit 7 bit 0<br />

Legend:<br />

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’<br />

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown<br />

bit 7-0 INT7:INT0: These bits reflect the interrupt condition on the port. Will reflect the change only if interrupts<br />

are enabled (GPINTEN) .<br />

1 = Pin caused interrupt.<br />

0 = Interrupt not pending.<br />

© 2007 <strong>Microchip</strong> Technology Inc. DS21919E-page 17

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