Optoelectronics with Carbon Nanotubes

surface, so the Fermi level of the metal depends on the work function of Pd, which is 5.22 eV 68
and is closer to the bottom of the energy gap for our sample. This makes the devices p-type
because holes have a much thinner and lower Schottky barrier than electrons. The devices were
annealed in argon or nitrogen at 220 °C for 10 minutes to improve contacts. The heavily-doped
silicon serves as the back gate (see Figure II-1 for a device schematic).
Figure II-1. Schematics of a back-gated CNTFET device. A CNT lies directly on
the SiO2 layer (thickness 50 to 1000 nm) grown thermally on a p++ silicon wafer.
The source and drain contacts are separated by a distance of about 1 μm. The
thickness of the layers is not to scale.
ii. Single-tube p-n diodes
The basic CNTFET design with added top split gates was used to create p- and n- regions
electrostatically (figure 2). For p-n junction devices, Ti=50 nm was used as the contact metal to
make the devices ambipolar, which is critical for efficient injection of p- and n- type carriers.
The work function of Ti, 4.33 eV 68 , makes the alignment with Fermi level roughly mid-gap.
CNTs were grown by CVD at 900 °C with the catalyst of iron oxide nanoparticles
(diameters 3 to 4 nm) and ethylene gas as the feedstock. The process is similar to the one
developed at Columbia University 101 . The tubes were grown on a highly p-doped silicon
substrate with a 200 nm-thick thermal silicon dioxide layer. The tube density was kept low (~1
CNT per 1000 μm 2 ) to keep the CNTs spatially separated for single-tube devices and to prevent
formation of nanotube bundles. After a Ti deposition by e-beam lithography for contacts, the
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