pSOSystem System Calls - Read

i_return pSOS+ System Calls
x86
On x86 processors, i_return() is executed by an INT 93H call.
Restoring CPU Registers Prior to Exiting the ISR
The examples below illustrate, for each processor, how an ISR restores CPU
registers before exiting via i_return().
CF
PPC
On ColdFire processors, an ISR must restore all CPU registers, including
the stack pointer, to their state prior to the interrupt. Below is a sample
code fragment for an ISR that internally uses CPU registers D0, D1, D2,
A0, and A2.
TRAP #12
MOVEM.L D0-D2/A0/A2,-(SP)
MOVEM.L (SP)+,D0-D2/A0/A2
TRAP #13
On PowerPC processors, right before i_return(), the stack pointer
must point to the pSOSystem standard exception frame allocated by the
interrupt vector code. Registers R29-R31, LR, CR, SRR0 & SRR1 and
SRR2 & SRR3 (for PowerPC 403) have been saved into the frame by the
vector code. The values of registers R0, R2-R13, CTR, XER and MQ (for
PowerPC 601) prior to the interrupt also need to be saved into the frame
by the ISR. i_return() will restore all the saved registers and deallocate
the frame. Below are sample code fragments of the vector code and an
ISR.
Sample vector code:
stwu sp, PS_FRM_SIZE(sp) # Allocate pSOSystem
# exception frame
stw r29, PS_FRM_R29(sp) # Save r29
stw r30, PS_FRM_R30(sp) # Save r30
stw r31, PS_FRM_R31(sp) # Save r31
mfsrr0 r29 #
stw r29, PS_FRM_SRR0(sp) # Save SRR0
mfsrr1 r30 #
stw r30, PS_FRM_SRR1(sp) # Save SRR1
mflr r31 #
stw r31, PS_FRM_LR(sp) # Save LR
mfcr r29 #
stw r29, PS_FRM_CR(sp) # Save CR
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