Threads in the new ISO C Standard from 2011

More documents

Recommendations

Info

Example of Cumulative Ordering // int a = b = 0; // Thread 1 Thread 2 Thread 3 1:a = 1; 2:lwsync 3:x = a; // a == 1 4:y = b; 5:lwsync B = { 2,3,5,6 } 6:b = 2; 7:x = b; // b == 2 8:lwsync 9:y = a; // a == 1 A = { } A = { 2,3,4 } A = { 2,4,7 } B += { 7,8 } B = { 6,7,9 } B = { 9 } Due to cumulativity of lwsync, it’s certain that if Thread 2 reads 1 in access 3 and Thread 3 reads 2 in access 7 then Thread 3 will read 1 in access 9. Using instead bc;isync Thread 3 may read zero in access 9. Jonas Skeppstedt (js@cs.lth.se) Lecture 6 2013 56 / 70
Implementation on Power The following is based on the ISO C/C++ standardization document ISO/EIC JTC1 SC22 WG21 N2745 written by Paul E McKenney and Raul Silvera from IBM. There are other implementations possible. Jonas Skeppstedt (js@cs.lth.se) Lecture 6 2013 57 / 70
Page 1 and 2:
Threads in the new ISO C Standard f
Page 3 and 4:
Atomic Objects Atomic objects are n
Page 5 and 6: Using Atomic Objects Members of an
Page 7 and 8: Lock Free Property To know whether
Page 9 and 10: Memory Order for Atomic Operations
Page 11 and 12: Answer: Yes The code may execute in
Page 13 and 14: Atomic Compare and Exchange There a
Page 15 and 16: Weak Compare and Exchange Functions
Page 17 and 18: Atomic Fetch and Modify Functions T
Page 19 and 20: Atomic Flag The atomic flag type an
Page 21 and 22: The C11 Memory Consistency Model fo
Page 23 and 24: Release and Acquire, and Consume Re
Page 25 and 26: Happens Before and Data Races We wi
Page 27 and 28: Sequenced Before The most common se
Page 29 and 30: An Example _Atomic int m; int u; //
Page 31 and 32: Dependences Dependences are intra-t
Page 33 and 34: Definition of Dependency in C11 A c
Page 35 and 36: Inter-Thread Happens Before An eval
Page 37 and 38: Read-Copy Update RCU is an alternat
Page 39 and 40: A Simplified Example Consider the f
Page 41 and 42: More Details About Dependences Reca
Page 43 and 44: Constant Propagation Example 2(3) T
Page 45 and 46: One More Data Dependency a = atomic
Page 47 and 48: Load and Reserve/Store Conditional
Page 49 and 50: Power Memory Barrier Instructions T
Page 51 and 52: lwsync Memory Barrier for Release O
Page 53 and 54: c;isync Memory Barrier for Load Acq
Page 55: Cumulative Ordering If the memory a
Page 59 and 60: Store Store relaxed st Store releas
Page 61 and 62: Acquire and Release a Spin Lock # a
Page 63 and 64: Initialization Function void call_o
Page 65 and 66: Mutex Options for mtx_init Function
Page 67 and 68: Condition Variable Functions int cn
Page 69 and 70: Thread Functions int thrd_create(th
show all

Threads in the new ISO C Standard from 2011

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?