Threads in the new ISO C Standard from 2011
Threads in the new ISO C Standard from 2011
Threads in the new ISO C Standard from 2011
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hwsync Memory Barrier for Sequential Consistency<br />
The A-set consists of all <strong>in</strong>structions preced<strong>in</strong>g <strong>the</strong> hwsync.<br />
The B-set consists of memory access <strong>in</strong>structions follow<strong>in</strong>g <strong>the</strong><br />
hwsync.<br />
Except for <strong>the</strong> <strong>in</strong>struction icbi which <strong>in</strong>validates an <strong>in</strong>struction cache<br />
block, no B-set <strong>in</strong>struction may be reordered with any A-set<br />
<strong>in</strong>struction.<br />
This is <strong>the</strong> most costly Power synchronzation <strong>in</strong>struction.<br />
Not only for cached data but for any storage.<br />
It’s used e.g. to implement sequentially consistent write on Power:<br />
stwx r1,r2,r3<br />
hwsync<br />
Jonas Skeppstedt (js@cs.lth.se) Lecture 6 2013 50 / 70