Threads in the new ISO C Standard from 2011

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C11 Current ISO C Standard is C11 from December 2011. See http://www.open-std.org/jtc1/sc22/wg14 C11 contains various news but we will focus on three in this course: Section 5.1.2.4 Multi-threaded executions and data races — similar to Pthreads — types, operators, and functions for atomic objects Jonas Skeppstedt (js@cs.lth.se) Lecture 6 2013 2 / 70
Atomic Objects Atomic objects are new in C11 and similar to Java volatile variables. Atomic objects can safely be accessed without locking: _Atomic int counter = ATOMIC_VAR_INIT(0); Thread 1 Thread 2 counter++; counter++; Of course, you may need locks for other reasons to protect your data. Atomic objects have a global modification order and all threads see the same modification order. There is no total modification order of all atomic objects — different threads can see the stores to different atomic objects in different orders. Jonas Skeppstedt (js@cs.lth.se) Lecture 6 2013 3 / 70
Page 1: Threads in the new ISO C Standard f
Page 5 and 6: Using Atomic Objects Members of an
Page 7 and 8: Lock Free Property To know whether
Page 9 and 10: Memory Order for Atomic Operations
Page 11 and 12: Answer: Yes The code may execute in
Page 13 and 14: Atomic Compare and Exchange There a
Page 15 and 16: Weak Compare and Exchange Functions
Page 17 and 18: Atomic Fetch and Modify Functions T
Page 19 and 20: Atomic Flag The atomic flag type an
Page 21 and 22: The C11 Memory Consistency Model fo
Page 23 and 24: Release and Acquire, and Consume Re
Page 25 and 26: Happens Before and Data Races We wi
Page 27 and 28: Sequenced Before The most common se
Page 29 and 30: An Example _Atomic int m; int u; //
Page 31 and 32: Dependences Dependences are intra-t
Page 33 and 34: Definition of Dependency in C11 A c
Page 35 and 36: Inter-Thread Happens Before An eval
Page 37 and 38: Read-Copy Update RCU is an alternat
Page 39 and 40: A Simplified Example Consider the f
Page 41 and 42: More Details About Dependences Reca
Page 43 and 44: Constant Propagation Example 2(3) T
Page 45 and 46: One More Data Dependency a = atomic
Page 47 and 48: Load and Reserve/Store Conditional
Page 49 and 50: Power Memory Barrier Instructions T
Page 51 and 52: lwsync Memory Barrier for Release O
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c;isync Memory Barrier for Load Acq
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Cumulative Ordering If the memory a
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Implementation on Power The followi
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Store Store relaxed st Store releas
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Acquire and Release a Spin Lock # a
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Initialization Function void call_o
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Mutex Options for mtx_init Function
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Condition Variable Functions int cn
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Thread Functions int thrd_create(th
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