Threads in the new ISO C Standard from 2011

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Using the Weak Compare and Exchange Functions _Atomic int a; int exp; int value; exp = atomic_load(&a); do value = f(exp); while (!atomic_compare_exchange_weak(&a, &exp, value)); Jonas Skeppstedt (js@cs.lth.se) Lecture 6 2013 16 / 70
Atomic Fetch and Modify Functions These functions atomically read-compute-modify an atomic object. computation C operator function addition + atomic_fetch_add_explicit subtraction - atomic_fetch_sub_explicit or | atomic_fetch_or_explicit xor ^ atomic_fetch_xor_explicit and & atomic_fetch_and_explicit Plus the usual non-explicit functions, for example: C atomic_fetch_add(volatile A* ptr, M value); adds value to what A points to. If A is arithmetic then M is C and if it’s atomic_address then M is ptr_diff_t. The value of *ptr before the operation is returned. Jonas Skeppstedt (js@cs.lth.se) Lecture 6 2013 17 / 70
Page 1 and 2: Threads in the new ISO C Standard f
Page 3 and 4: Atomic Objects Atomic objects are n
Page 5 and 6: Using Atomic Objects Members of an
Page 7 and 8: Lock Free Property To know whether
Page 9 and 10: Memory Order for Atomic Operations
Page 11 and 12: Answer: Yes The code may execute in
Page 13 and 14: Atomic Compare and Exchange There a
Page 15: Weak Compare and Exchange Functions
Page 19 and 20: Atomic Flag The atomic flag type an
Page 21 and 22: The C11 Memory Consistency Model fo
Page 23 and 24: Release and Acquire, and Consume Re
Page 25 and 26: Happens Before and Data Races We wi
Page 27 and 28: Sequenced Before The most common se
Page 29 and 30: An Example _Atomic int m; int u; //
Page 31 and 32: Dependences Dependences are intra-t
Page 33 and 34: Definition of Dependency in C11 A c
Page 35 and 36: Inter-Thread Happens Before An eval
Page 37 and 38: Read-Copy Update RCU is an alternat
Page 39 and 40: A Simplified Example Consider the f
Page 41 and 42: More Details About Dependences Reca
Page 43 and 44: Constant Propagation Example 2(3) T
Page 45 and 46: One More Data Dependency a = atomic
Page 47 and 48: Load and Reserve/Store Conditional
Page 49 and 50: Power Memory Barrier Instructions T
Page 51 and 52: lwsync Memory Barrier for Release O
Page 53 and 54: c;isync Memory Barrier for Load Acq
Page 55 and 56: Cumulative Ordering If the memory a
Page 57 and 58: Implementation on Power The followi
Page 59 and 60: Store Store relaxed st Store releas
Page 61 and 62: Acquire and Release a Spin Lock # a
Page 63 and 64: Initialization Function void call_o
Page 65 and 66: Mutex Options for mtx_init Function
Page 67 and 68:
Condition Variable Functions int cn
Page 69 and 70:
Thread Functions int thrd_create(th
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Threads in the new ISO C Standard from 2011

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