Solaris Application Programming, 1/e - Chapter 4 - Parent Directory

4.2 TOOLS THAT REPORT SYSTEM CONFIGURATION 51
Other tools exist that provide system information at various levels of detail. The
tools prtconf, prtpicl, and prtfru produce long lists of system configuration
information, the contents of which depend on the details available on the particular
platform.
4.2.3 Enabling Virtual Processors (psrinfo and psradm)
psrinfo is a tool that will report whether the virtual processors are enabled.
Sample output from psrinfo, run on a system with two 900MHz processors, is
shown in Example 4.2. You can obtain more detailed output using psrinfo -v.
Example 4.2 Sample Output from psrinfo and psrinfo -v
$ psrinfo
0 on-line since 11/20/2003 11:18:59
1 on-line since 11/20/2003 11:19:00
$ psrinfo -v
Status of virtual processor 0 as of: 10/23/2006 21:47:30
on-line since 11/20/2003 11:19:00.
The sparcv9 processor operates at 900 MHz,
and has a sparcv9 floating-point processor.
Status of virtual processor 1 as of: 10/23/2006 21:47:30
on-line since 11/20/2003 11:19:00.
The sparcv9 processor operates at 900 MHz,
and has a sparcv9 floating-point processor.
Solaris 10 introduced the -p option to psrinfo that reports on the physical
processors in the system. Example 4.3 shows the output from a system that has a
single UltraSPARC T1 physical processor with 32 virtual processors.
Example 4.3 Output from psrinfo -pv from an UltraSPARC T1 System
$ psrinfo -pv
The physical processor has 32 virtual processors (0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
UltraSPARC T1 (cpuid 0 clock 1200 MHz)
You can enable or disable the virtual processors using the psradm tool. The -f
flag will disable a processor and the -n flag will enable it. This tool is available
only with superuser permissions.
The -i flag for psradm excludes CPUs from handling interrupts; this may be of
use when partitioning the workload over multiple CPUs. Example 4.4 shows the
command for excluding CPU number 1 from the CPUs that are available to handle
interrupts.