Audio Codec '97 Revision 2.1

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AC ‘97 Component Specification Revision 2.1 6.1.1 PCM out path and optional 3D bypass............................................................................................... 37 6.2 MIXER INPUT......................................................................................................................................... 37 6.3 MIXER REGISTERS ................................................................................................................................. 38 6.3.1 Reset Register (Index 00h)................................................................................................................. 39 6.3.2 Play Master Volume Registers (Index 02h, 04h and 06h).................................................................... 40 6.3.3 Master Tone Control Registers (Index 08h)........................................................................................ 41 6.3.4 PC Beep Register (Index 0Ah) ........................................................................................................... 41 6.3.5 Analog Mixer Input Gain Registers (Index 0Ch - 18h)........................................................................ 42 6.3.6 Record Select Control Register (Index 1Ah)....................................................................................... 42 6.3.7 Record Gain Registers (Index 1Ch and 1Eh)...................................................................................... 43 6.3.8 General Purpose Register (Index 20h) ............................................................................................... 44 6.3.9 3D Control Register (Index 22h)........................................................................................................ 44 6.3.10 Reserved (was Modem Sample Rate Register) (Index 24h).............................................................. 45 6.3.11 Powerdown Control/Status Register (Index 26h) ............................................................................ 45 6.3.12 Extended Audio Registers (Index 28h – 3Ah).................................................................................. 46 6.3.13 Extended Modem Registers (Index 3Ch – 58h) ............................................................................... 46 6.3.14 Vendor Reserved Registers (Index 5Ah - 7Ah) ................................................................................ 46 6.3.15 Vendor ID Registers (Index 7Ch - 7Eh).......................................................................................... 46 7. LOW POWER MODES ............................................................................................................................. 47 8. TESTABILITY........................................................................................................................................... 49 8.1 ACTIVATING THE TEST MODES............................................................................................................... 49 8.2 TEST MODE FUNCTIONS......................................................................................................................... 49 8.2.1 ATE in circuit test mode .................................................................................................................... 49 8.2.2 Vendor-specific test mode.................................................................................................................. 49 9. AC-LINK DIGITAL DC AND AC CHARACTERISTICS....................................................................... 50 9.1 DC CHARACTERISTICS........................................................................................................................... 50 9.2 AC TIMING CHARACTERISTICS............................................................................................................... 51 9.2.1 Reset................................................................................................................................................. 51 9.2.1.1 Cold Reset ................................................................................................................................................ 51 9.2.1.2 Warm Reset .............................................................................................................................................. 51 9.2.2 Clocks............................................................................................................................................... 52 9.2.3 Data Setup And Hold......................................................................................................................... 53 9.2.4 Signal Rise and Fall Times ................................................................................................................ 53 9.2.5 AC-link Low Power Mode Timing...................................................................................................... 54 9.2.6 ATE Test Mode.................................................................................................................................. 54 10. ANALOG PERFORMANCE CHARACTERISTICS ........................................................................... 55 11. AC ’97 2.0 EXTENSIONS ...................................................................................................................... 56 11.1 INTRODUCTION...................................................................................................................................... 56 11.2 OVERVIEW OF EXTENDED AC ’97 2.0 FUNCTIONALITY........................................................................... 56 11.2.1 AC ’97 2.0 Audio........................................................................................................................... 56 11.2.2 AMC ’97 2.0 Combined Audio and Modem AFE ............................................................................ 57 11.2.3 MC ’97 2.0 Modem AFE................................................................................................................ 58 11.3 EXTENDED AC ’97 2.0 REGISTER SUMMARY.......................................................................................... 59 APPENDIX A. AC ’97 2.0 VARIABLE SAMPLE RATE EXTENSION ......................................................... 60 A.1 INTRODUCTION...................................................................................................................................... 60 A.2 EXTENDED AUDIO REGISTER DEFINITIONS ............................................................................................. 60 A.2.1 Extended Audio ID Register (Index 28h) ........................................................................................ 60 A.2.2 Extended Audio Status and Control Register (Index 2Ah) ............................................................... 61 A.2.3 Audio Sample Rate Control Registers (Index 2Ch - 34h)................................................................. 61 A.2.4 6-Channel Volume Control Register (Index 36h and 38h)............................................................... 62 6 May 22, 1998
AC ‘97 Component Specification Revision 2.1 A.3 “ON DEMAND” SAMPLE TRANSPORT SCHEME DEFINITIONS .................................................................... 62 A.3.1 Variable Sample Rate Signaling Protocol ...................................................................................... 63 A.3.2 Input Slot 1: Status Address Port / SLOTREQ Bits ......................................................................... 64 A.3.3 SLOTREQ Behavior and Power Management ................................................................................ 64 APPENDIX B. AC ’97 2.0 MODEM AFE EXTENSION.................................................................................. 65 B.1 INTRODUCTION...................................................................................................................................... 65 B.2 SLOT ASSIGNMENTS FOR LINE, HANDSET, AND GPIO PIN STATUS AND CONTROL ................................... 65 B.3 MODEM AFE REGISTER DEFINITIONS..................................................................................................... 66 B.3.1 Extended Modem ID Register (Index 3Ch) ......................................................................................... 66 B.3.2 Extended Modem Status and Control Register (Index 3Eh)................................................................. 66 B.3.3 Modem Sample Rate Control Registers (Index 40h – 44h) .................................................................. 67 B.3.4 Modem DAC/ADC Level Control Registers (Index 46h – 4Ah) ........................................................... 68 B.3.5 GPIO Pin Configuration Register (Index 4Ch)................................................................................... 68 B.3.6 GPIO Pin Polarity/Type Register (Index 4Eh).................................................................................... 69 B.3.7 GPIO Pin Sticky Register (Index 50h)................................................................................................ 69 B.3.8 GPIO Pin Wake-up Mask Register (Index 52h) .................................................................................. 69 B.3.9 GPIO Pin Status Register (Index 54h)................................................................................................ 69 B.3.10 Miscellaneous Modem AFE Status and Control Register (Index 56h).............................................. 70 B.4 GPIO PIN DEFINITIONS.......................................................................................................................... 70 B.4.1 GPIO Pin Implementation ................................................................................................................. 71 B.4.2 Recommended Slot 12 GPIO Bit Definitions ...................................................................................... 72 B.5 WAKE UP AND POWER MANAGEMENT EVENT (PME#) SUPPORT ............................................................. 72 B.5.1 Combined Audio/Modem AFE Codec (AMC ’97) ............................................................................... 73 B.5.2 Split Partitioned Implementations (AC ’97 2.0 + MC ’97).................................................................. 74 B.5.2.1 The MLNK bit .......................................................................................................................................... 75 B.5.3 Wake Up and Voltage Sequencing ..................................................................................................... 75 B.5.4 Wake Up and Caller ID Decode in the Controller and/or Codec ........................................................ 75 B.6 LOOPBACK MODES FOR TESTING ............................................................................................................ 77 APPENDIX C. AC ‘9 2.0 MULTIPLE CODEC EXTENSION......................................................................... 79 C.1 INTRODUCTION...................................................................................................................................... 79 C.2 PRIMARY AND SECONDARY CODEC DEFINITIONS .................................................................................... 80 C.2.1 Primary Codec Definitions ................................................................................................................ 80 C.2.2 Secondary Codec Definitions............................................................................................................. 81 C.3 SECONDARY CODEC REGISTER ACCESS DEFINITIONS.............................................................................. 81 C.3.1 “Atomic slot” treatment of Slot 1 Address and Slot 2 Data................................................................. 82 C.4 CLOCKING FOR MULTIPLE CODEC IMPLEMENTATIONS ............................................................................ 83 APPENDIX D. AC ’97 2.1 SPECIFICATION UPDATES ................................................................................ 84 D.1 AC ’97 2.1 AUDIO................................................................................................................................. 84 D.1.1 New Audio Definitions................................................................................................................... 84 D.1.1.1 External Audio Amplifier Control Bit and Pin............................................................................................ 84 D.1.1.2 Line Out (Speaker), Headphone Out, True Line Out (CE)........................................................................... 84 D.1.1.3 Elimination of the On-board Audio Speaker............................................................................................... 85 D.1.2 Audio Codec Cost Reduction Options ............................................................................................ 86 D.2 AC ’97 2.1 MODEM............................................................................................................................... 87 D.2.1 New Modem Definitions ................................................................................................................ 87 D.2.1.1 Elimination of the On-board Modem Speaker............................................................................................. 87 D.2.2 Modem Codec Cost Reduction Options .......................................................................................... 87 D.2.2.1 Required Sample Rates.............................................................................................................................. 87 D.2.2.2 Internal PHONE and MONO_OUT Connections (AMC ’97)...................................................................... 87 D.3 AC ’97 2.1 MULTIPLE CODEC DEFINITIONS............................................................................................ 88 D.3.1 Multiple Codec Clocking Requirements ......................................................................................... 88 D.3.1.1 Primary AC, MC, or AMC Codec.............................................................................................................. 88 D.3.1.2 Secondary AC Codec ................................................................................................................................ 88 D.3.1.3 Secondary MC Codec................................................................................................................................ 88 7 May 22, 1998
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