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Audio Codec '97 Revision 2.1

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AC ‘97 Component Specification <strong>Revision</strong> <strong>2.1</strong><br />

9.2.3 Data Setup And Hold<br />

AC ’97 <strong>2.1</strong> Appendix D updates DC and AC characteristics. Chapter 9 should NOT be used for new designs.<br />

(50pF external load)<br />

BIT_CLK<br />

SYNC,<br />

SDATA_OUT<br />

T setup<br />

T hold<br />

Figure 22. Data setup and hold timing diagram<br />

Parameter Symbol Min Typ Max Units<br />

Setup to falling edge of BIT_CLK Tsetup 15.0 - - ns<br />

Hold from falling edge of BIT_CLK Thold 5.0 - - ns<br />

Table 26. Data setup and hold timing parameters<br />

Note 1: Setup and hold time parameters for SDATA_IN are with respect to the AC ‘97 Controller.<br />

9.2.4 Signal Rise and Fall Times<br />

AC ’97 <strong>2.1</strong> Appendix D updates DC and AC characteristics. Chapter 9 should NOT be used for new designs.<br />

(50pF external load; from 10% to 90% of Vdd)<br />

BIT_CLK<br />

SYNC<br />

SDATA_IN<br />

SDATA_OUT<br />

Trise clk<br />

Trise sync<br />

Trise din<br />

Trise dout<br />

53<br />

Tfall clk<br />

Tfall sync<br />

Tfall din<br />

Tfall dout<br />

Figure 23. Signal rise and fall times diagram<br />

Parameter Symbol Min Typ Max Units<br />

BIT_CLK rise time Triseclk 2 - 6 ns<br />

BIT_CLK fall time Tfallclk 2 - 6 ns<br />

SYNC rise time Trisesync 2 - 6 ns<br />

SYNC fall time Tfallsync 2 - 6 ns<br />

SDATA_IN rise time Trisedin 2 - 6 ns<br />

SDATA_IN fall time Tfalldin 2 - 6 ns<br />

SDATA_OUT rise time Trisedout 2 - 6 ns<br />

SDATA_OUT fall time Tfalldout 2 - 6 ns<br />

Table 27. Signal rise and fall times parameters<br />

May 22, 1998

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