Audio Codec '97 Revision 2.1
Audio Codec '97 Revision 2.1
Audio Codec '97 Revision 2.1
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AC ‘97 Component Specification <strong>Revision</strong> <strong>2.1</strong><br />
9.2.2 Clocks<br />
AC ’97 <strong>2.1</strong> Appendix D updates DC and AC characteristics. Chapter 9 should NOT be used for new designs.<br />
(50pF external load)<br />
BIT_CLK<br />
SYNC<br />
T sync_high<br />
T clk_high<br />
T clk_period<br />
52<br />
T clk_low<br />
T sync_low<br />
T sync_period<br />
Figure 21. BIT_CLK to SYNC timing diagram<br />
Parameter Symbol Min Typ Max Units<br />
BIT_CLK frequency - 12.288 - MHz<br />
BIT_CLK period Tclk_period - 81.4 - ns<br />
BIT_CLK output jitter - - 750 ps<br />
BIT_CLK high pulse width (note 1) Tclk_high 32.56 40.7 48.84 ns<br />
BIT_CLK low pulse width (note 1) Tclk_low 32.56 40.7 48.84 ns<br />
SYNC frequency - 48.0 - kHz<br />
SYNC period Tsync_period - 20.8 - us<br />
SYNC high pulse width Tsync_high - 1.3 - us<br />
SYNC low pulse width Tsync_low - 19.5 - us<br />
Notes:<br />
1) Worst case duty cycle restricted to 40/60.<br />
Table 25. BIT_CLK to SYNC timing parameters<br />
May 22, 1998