WAVES AND VIBRATIONS IN INHOMOGENEOUS STRUCTURES ...

fabrication method. Furthermore, fabrication tolerances are currently pushed to their limits to
obtain acceptable structures, leaving only little room for improvement.
Fabrication of nanophotonic structures using nanoimprint lithography (NIL) [13] is
emerging as a cost-efficient alternative capable of nanometer-to-micrometer-scale pattern
definition in a parallel process. The resolution of NIL is currently limited by the resolution of
the stamp, where e.g. 5-nm linewidth and 14-nm pitch line gratings have been demonstrated
[14].
Here, we demonstrate the feasibility of NIL for the fabrication of SOI-based
nanophotonic components. In our fabrication process lateral resolution better than 30 nm is
achieved on the NIL stamp by high resolution EBL in a thin film of negative resist and
subsequent reactive ion etching (RIE). The pattern is imprinted in a thin film of NIL resist
with a high etch resistance to silicon RIE, which facilitates device definition with the required
high lateral resolution in combination with deep etching into the SOI substrate.
In our device demonstrations, we have realized planar W1 PhCWs, i.e. where the defect
is formed by removing one row of holes in the Γ-K direction of the crystal lattice as shown in
Fig. 1(left). Furthermore, we demonstrate topology-optimized photonic structures [15,16], see
Fig. 2. This type of structure is particular challenging to fabricate with NIL as the frequency
response of the device is highly sensitive to the complicated non-circular features of the
optimized structures and impose local variations in the pattern density. The pattern replication
fidelity is assessed by comparing the measured frequency response with 3D finite-difference
time-domain (FDTD) calculations [17].
2. Nanoimprint lithography fabrication
The fabrication of SOI-based nanophotonic devices is based on thermal NIL [13]. The desired
pattern is defined as a surface relief on the stamp (a silicon wafer) by EBL and RIE. The
pattern is transferred to a thin film of thermoplastic resist on the SOI device wafer by
mechanical deformation as the stamp is embossed into the heated resist. Finally, the pattern is
transferred into the top silicon layer of the SOI wafer by RIE. High resolution and high aspect
ratio of the transferred pattern is obtained by exploiting a high-resolution negative EBL resist
for silicon stamp fabrication in combination with NIL in the thermoplastic resist with high
etching resistance.
The silicon stamp is fabricated by 100 kV EBL (JEOL JBX9300FS) in a 50 nm thin film
of TEBN-1 [18] on a silicon substrate (100 mm diameter and 0.5 mm thick) at an exposure
dose of 9 mC/cm 2 [19]. The written structures are developed in methyl isobutyl ketone
(MIBK) for 20 seconds, rinsed in isopropyl alcohol (IPA), and subsequently transferred 100
nm into the silicon substrate by a highly anisotropic RIE [20]. After etching the silicon, any
remaining resist is removed in oxygen plasma prior to deposition of an anti-sticking layer
formed from a C4F8 plasma and imprinting.
The passivation layer deposition capability of a deep reactive ion etching tool is used to
plasma deposit an anti-sticking layer on the stamp, as originally suggested by Ayón et al [21].
A few monolayers of PTFE-like fluorocarbon polymer is deposited from C4F8 precursor gas,
which is dissociated by plasma to form ions and radical species [22]. The dissociated species
subsequently polymerize on the surface and form a layer of polymerized nCF2. The thickness
of such a fluorocarbon film has been measured to around 5 nm [22]. Without the anti-sticking
layer, the polymer will stick to the stamp, and parts of the polymer pattern are peeled off the
substrate when the stamp and substrate are separated.
The nanophotonic devices are fabricated in a SOI wafer from Soitec (100 mm diameter
and 340 nm silicon on top of 1 μm buried oxide). An 80 nm thin film of mr-I T85 (4 wt%)
[23] is spin coated onto the SOI substrate at a spin speed of 3000 rpm and baked at 150°C for
5 min on a hotplate. The stamp is imprinted in the mr-I T85 film using a pressure of 13 bar for
10 minutes in a parallel plate imprint tool (EVG 520HE) under vacuum (0.01 mbar) and at a
temperature of 140°C.. The stamp and the SOI wafer are separated at a lowered temperature
of 60°C. The imprint parameters result in a complete filling situation of the stamp in the
photonic-crystal structured areas, resulting in 80 nm deep holes in the mr-I T85 resist. The
#76773 - $15.00 USD Received 6 November 2006; revised 18 January 2007; accepted 19 January 2007
(C) 2007 OSA 5 February 2007 / Vol. 15, No. 3 / OPTICS EXPRESS 1263