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Advanced Chipset Features<br />
BIOS Setup<br />
DRAM Timing<br />
The value in this field depends on performance parameters of the installed memory<br />
chips (DRAM). Do not change the value from the factory setting unless you install<br />
new memory that has a different performance rating than the original DRAMs.<br />
CAS# Latency (Tcl)<br />
This controls the CAS latency, which determines the timing delay (in clock cycles)<br />
before SDRAM starts a read <strong>com</strong>mand after receiving it.<br />
Min RAS# Active Time (Tras)<br />
This setting determines the time RAS takes to read from and write to a memory cell.<br />
RAS# Precharge Time (Trp)<br />
This item controls the number of cycles for Row Address Strobe (RAS) to be allowed<br />
to precharge. If insufficient time is allowed for the RAS to accumulate its charge<br />
before DRAM refresh, refreshing may be in<strong>com</strong>plete and DRAM may fail to retain<br />
data. This item applies only when synchronous DRAM is installed in the system.<br />
RAS# to CAS# Delay (Trcd)<br />
When DRAM is refreshed, both rows and columns are addressed separately. This<br />
setup item allows you to determine the timing of the transition from RAS (row address<br />
strobe) to CAS (column address strobe). The less the clock cycles, the faster the<br />
DRAM performance.<br />
VGA Share Memory Size<br />
The system shares memory to the onboard VGA card. This setting controls the exact<br />
memory size shared to the VGA card.<br />
3-11
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