Ph.D. Thesis - Physics
Ph.D. Thesis - Physics
Ph.D. Thesis - Physics
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in trap depth, however, comes decompensation of the trap. This fact is demonstrated by<br />
plotting cross sections of the pseudopotential for two different top plate voltages in Fig. 6-3.<br />
With Vtop = -25.4 V, we predict that the trap should be compensated, with a trap depth of<br />
1.0 eV. By contrast, Vtop = 15 V leads to a decompensated trap with a depth of 5.4 eV. A<br />
typical strategy, at least in the early period of surface-electrode ion trapping in our group,<br />
was to apply a voltage to the top plate to enhance the depth for initial trapping, and then<br />
gradually tune the compensation voltages and laser positions while reducing Vtop to the<br />
compensated value. In Fig. 6-4, we plot both the trap depth and the displacement of the<br />
trap center from the rf null as a function of the top plate voltage Vtop.<br />
We have seen the principle illustrated in Fig. 6-4 used in Ch. 5 already, in the macroion<br />
experiment, when a high trap depth was useful, but compensation was not critical to the<br />
measurements. In the atomic ion experiment of that chapter, fortunately, applying a voltage<br />
to the top plate was not required. The main caveat regarding this theoretical work is that the<br />
real compensated values may be quite different from the prediction due to stray fields. In the<br />
next section we will actually measure the stray fields and find quite different compensation<br />
voltages. However, it is still useful to have an idea of how the trap will behave if there are<br />
no stray fields; hopefully, they are but a perturbation on the controlled fields.<br />
6.2.2 Constructing and mounting the trap<br />
The trap was manufactured by Hughes Circuits in San Diego, CA. The electrodes are<br />
copper deposited on a fiberglass epoxy substrate, Rogers 4350B, which features a small<br />
rf loss tangent and UHV-compatibility. The thickness of the copper is about 25 µm. The<br />
minimum feature size is about 75 µm, which obviously limits the extension of the technology<br />
to microfabricated traps. In addition, the slot size was set at 850 µm since this was the<br />
smallest standard slot size. To reduce the accumulation of stray charges, the dielectric<br />
material in between rf electrodes was milled out by Hughes, and the sides plated with<br />
copper.<br />
The electrodes were polished using a multi-step diamond grid process. This process<br />
involves putting diamond grit paste containing diamond pieces of a given average size,<br />
together with a lubricating oil, onto a paper disk that is mechanically rotated. Polishing is<br />
done by moving the rotating disk across a trap that is mounted securely on a countertop.<br />
Following each polishing step, the trap is thoroughly cleaned with acetone and isopropanol<br />
and then a smaller-caliber grit paste is applied to a new disk for the next step. Diamond sizes<br />
ranging from 15 µm to 1 µm were used. Following this process, the trap was cleaned using<br />
the multi-step vacuum cleaning process described in Sec. 5.3.1. Fig. 6-5 is a photograph of<br />
the trap after the polishing and cleaning processes.<br />
Following the cleaning, the trap was mounted in the vacuum chamber using a breadboard-<br />
style component from Kimball <strong>Ph</strong>ysics that is secured to the “grabber grooves” that are a<br />
part of the spherical octagon vacuum chamber. The top plate, consisting for this experi-<br />
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