Accurate HFSS Simulation of SMT Components in SiP and MCM ...

Weimin Sun and Hongxiao Shao
Skyworks Solutions
16 Oct 2007
Accurate HFSS Simulation of SMT
Components in SiP and MCM Designs

Outline
2 10/16/2007
• Wireless Market Evolution
• Why SMT Components?
• A Sample MCM Laminate Design
• HFSS Simulation Setups for a SMD
• Intrinsic Inductance of Lumped Port
• How to Split a Port with No GND Reference
• Recommendations

Mobile Handset Evolution
3 10/16/2007

Mobile Handset Market Continues to Grow
4 10/16/2007
Market Forecast by Air Interface

Handset’s Engine Is a MCM/PCB
5 10/16/2007
Baseband
Mixed Signal
Power Management
Power Amplifier
Switch/Filter

Skyworks Is A Leader in PA / Front-End Module
6 10/16/2007

SMD Widely Used in MCM/FEMs
7 10/16/2007
SMDs
MCM

What Challenges in Handset RF Design?
8 10/16/2007
• Integration of Multi-Medium Standards
WLAN, GPRS, WCDMA, GPS, MP3, Video, Web…
• System Miniaturization
• Lower Cost
SOC, SiP, MCM, Stacked Die …
Laminate PCB, SMT Components, Shrunk Die, Larger Wafer…
• Improved Performance
Efficiency, Power, Noise/Xtalk, EMI, Z Matching …
• System and Module Level A/D Mixed Simulation/Design
EM Sim, Fast Spice, Mixed Signal Sim …

How EM Simulation Helps RF Design?
9 10/16/2007
• Increased Demand for EM Co-simulation
IR Drop, Xtalk, EMI, Embedded Matching …
• Passive Design Optimization
Inductor, T-line, Wire-Bond Tuning, Vias …
• 3D Module Design
SMD, Stacked Die, Package, Wires, Module …
• Distributed Circuit at High Frequency
Beyond Limit of Lumped RLC, SPICE, Quasi-static Solution…
• True Full-Wave Solution
Loss, Coupling, Dispersion, Radiation, Cross-talk …

Why Use SMT Components?
• Achieve Large L/C Value off-Chip
• Higher Q (lower loss)
• Easy Tuning/Design Optimization
• Reduced Development Cycle Time
• ‘Lumped’ and ‘Discrete’ for Simulation
• Competitive Vendors –> Low cost
10 10/16/2007
SMD
PA
MCM

A Sample EM Simulation Flow
11 10/16/2007
APD Ansoftlink 3D Model
S11/S21
5
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
SMD
-55
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Freq (GHz)
MCM/Board Data
SnP/Spice Model

SMD Simulation Facilities in HFSS
• Add Physical SMD into Model
•Treat SMD as Part of the Layout Design
•Direct FEM Meshing on Fine Structure of the SMD
• Assign Surface/Boundary with Lumped SMD Parasitic
•Introduce an Artificial Impedance Surface near SMD
•Make the Z-Surface Equivalent to SMD Parasitic from Vendor
• Define a Lumped Port and Simulate in SPICE
•Define Lumped Port at SMD Pads
•Create S-Parameter Model including SMD ports
•Spice Simulation of the Design with the S-Parameter Model
12 10/16/2007

SMD Modeling in HFSS
– Physical SMD Model
13 10/16/2007
•Accurate and Physical
•But Most SMD Internal Material/Geometry Data Not Available
•Need Fine Mesh to Account for Micro-Structure Details
•CPU/Memory Expensive
•Not Practical in Design Optimization/Tuning

SMD Modeling in HFSS
– Lumped Port vs. Lumped RLC Surface
Lumped Surface (RLC)
• SMD included in the model
• SMD bulk dielectric effect
• Fewer ports and smaller S-parameter file
14 10/16/2007
Lumped Port
• Larger S-parameter file/matrix
• Easy SMD tuning/design optimization
• May need to calibrate out SMD bulk dielectric

Setup for A Lumped SMD Port
Single Port
15 10/16/2007
Port 1
…..
Port 1
Port 2
…..
Dual Ports PEC to Ground Ports

A MCM Laminate Design
16 10/16/2007
Laminate Design 3D Model
Selected Nets into a 3D Model
Probed

A MCM Laminate Design
-- Equivalent Net Circuit Modeled
Vcc RF_out
17 10/16/2007
SMT Components
L
L1
R=
L
L3
L
L2
R=
R
C
Port1 R1
C3
Port2
C
C_Vcc_shunt
C
C5
Term
Term7
Num=7
Z=50 Ohm
Port1
Port2
Term S5P
Term8 SNP4
Num=8
Z=50 Ohm
1
5
2
Vcc_port
4
3
Ref
R
R5
C3_port
C5_port
L
L13
L
L5
R=
L
L4
C
C_3
C
C14
C
C_5

SMD Modeling in HFSS
– Lumped Port vs. Lumped RLC Surface
18 10/16/2007
S21/S11 (dB)
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
Pink: Single-Ended SMD Port Used
Brown: Dual SMD Ports Used
Green: SMD Modeled with Lumped RLC
Why ??
-50
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Freq (GHz)

Single SMD Port vs. Dual SMD Ports
19 10/16/2007
L
L1
R
R1
C
C1
Port 1
…..
SMD
SMD C
Forced GND on schematic
• Mathematically Equivalent
S Matrix – Mapping ∆V of SMD Ends
• Physically SMD End not GNDed
• Easy to Define Port for SMDs
L
L1
R
R1
C1
Port 1
Port 2
…..
• Schematic and Physical Connection Matched
• Bias and Decoup SMDs Can be Modeled
• But Difficult to Define Ports Ref to GND

Post Port Split from S/Y Matrix
20 10/16/2007
Port 1
I 1
S
I 2
V 1 V 2
S to Y
⎡Y
⎢
⎣Y
1+1 Port 2+1 Port
11
21
Y
Y
12
22
⎤
⎥
⎦
Port 2
Port 1
Port 2
V 1
V 2
I 1
I 2
S
I 3
V 3
Force: I 1 = - I 2 = I 1
V 1 = - V 2 = 0.5 V 1
⎡2Y
⎢
⎢
0
⎢⎣
Y
11
21
0
2Y
−Y
11
21
Y to S
Y
12
−Y
Y
22
Port 3
12
⎤
⎥
⎥
⎥⎦

21 10/16/2007
Post Port Split from S/Y Matrix
-- General N Port Matrix
NxN Matrix with the i th Port Split into Dual Ports (i th and (i+1) th )
NxN
⎥
⎥
⎥
⎥
⎦
⎤
⎢
⎢
⎢
⎢
⎣
⎡
N
N
N
N
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
,
2
,
1
,
,
2
2
,
2
1
,
2
,
1
2
,
1
1
,
1
...
...
...
...
...
...
...
1)
1)x(N
(N +
+
+
−
+
+
+
+
+
−
+
+
+
−
+
−
−
+
−
−
−
−
−
−
+
−
⎥
⎥
⎥
⎥
⎥
⎥
⎥
⎥
⎥
⎥
⎥
⎦
⎤
⎢
⎢
⎢
⎢
⎢
⎢
⎢
⎢
⎢
⎢
⎢
⎣
⎡
−
−
−
−
−
−
−
−
N
N
i
N
i
N
i
N
i
N
N
N
i
i
i
i
i
i
i
i
i
i
N
i
i
i
i
i
i
i
i
N
i
i
i
i
i
i
i
i
N
i
i
i
i
i
i
i
i
i
i
N
i
i
i
i
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
,
1
,
,
,
1
,
1
,
,
1
1
,
1
,
1
,
1
1
,
1
1
,
1
,
1
,
,
1
,
1
,
,
1
,
,
1
,
1
,
,
1
1
.
1
,
1
,
1
1
,
1
1
,
1
,
1
1
,
1
,
1
,
1
1
,
1
1
,
1
...
...
...
...
...
...
...
...
...
...
...
...
...
2
0
...
...
0
2
...
...
...
...
...
...
...
...
...
...
...
...
...
i i+1 N+1
i
i+1

Post Port Split
22 10/16/2007
S21/S11 (dB)
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
Pink: Single-Ended SMD Port Used
Brown: Dual SMD Ports Used
Green: Single SMD Port with Post Split into Two
-50
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Freq (GHz)

Simulation vs. Measurement
23 10/16/2007
S21/S11 (dB)
0
-5
-10
-15
-20
-25
-30
-35
-40
Term
Term7
Num=7
Z=50 Ohm
Port1
Port2
Term S5P
Term8 SNP4
Num=8
Z=50 Ohm
1
5
2
Vcc_port
4
3
Ref
C3_port
C5_port
Measurement
L
L13
L=0.25 nH
R=0.2
L
L4
L=0.25 nH
R=0.2
C
C_3
C
C_5
-45
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Freq (GHz)
R
R5
L
L5
R=
??
C
C14
Full SMD Parasitic Used in Schematic
Notch sensitive to L13 !!

Any Intrinsic Inductance in a Lumped Port ?
24 10/16/2007
W
Current Sheet
l
∫ • ∝ AdV J L
µ 0l
⎡ 2l
W ⎤
L =
⎢
ln( ) + 0.
50049 +
2π
⎥
⎣ W
3l
⎦

Intrinsic Inductance in a Lumped Port
25 10/16/2007
Term
Term7
Num=7
Z=50 Ohm
Port1
Port2
Term S5P
Term8 SNP4
Num=8
Z=50 Ohm
Vcc_port
R
R5
C3_port
C5_port
Port Intrinsic Inductance
Corrected
1
5
2
4
3
Ref
L
L5
R=
L
L13
L=0.06 nH
L
L4
L=0.06 nH
S21/S11 (dB)
C
C_3
C
C14
C
C_5
0
-5
-10
-15
-20
-25
-30
-35
-40
Brown: SMD Parasitic from Data Sheet
Blue: Measurement
Pink: SMD Port Intrinsic L Deducted
-45
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Freq (GHz)

Intrinsic Inductance vs. Port Shape
26 10/16/2007
S21/S11 (dB)
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Freq (GHz)
Slim port
Wide port
50pH difference to shift the Notch

A Second Check with Measurement
27 10/16/2007
•S21 Matches Well
•S11/S22 Show Different Circle Diameter on Smith Chart
S21/S11 (dB)
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Freq (GHZ)
S21
S11
Pink: HFSS Blue: Measurement
S11/S22
freq (100.0MHz to 6.000GHz)
S22

Simulation or Measurement?
-- A Second Try With an FDTD Simulator
28 10/16/2007
•HFSS and FDTD Match Well (S21, S11, S22)
•Still S11/S22 Not Match to Measurement
S21/S11 (dB)
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Freq (GHz)
S21
S11
Pink: HFSS Blue: Measurement Green: FDTD
S11/S22
freq (100.0MHz to 6.000GHz)

Is Reference 50 Ohm at Probed Port?
29 10/16/2007
Probed Spot
50Ω
?? Ω
Model
Jsuf
@1.5 GHz
Port

Is Reference 44 Ohm at Probed Port?
S21/S11 (dB)
30 10/16/2007
0
-5
-10
-15
-20
-25
-30
-35
-40
Term
Term3
Num=3
Z=44 Ohm
Measurement Data
1
Ref
S2P
SNP1
If reference to 44 Ohm (measured)
-45
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Freq (GHz)
Pink: HFSS Blue: Measurement Green: FDTD
2
S11/S22
Term
Term4
Num=4
Z=50 Ohm
freq (100.0MHz to 6.000GHz)

Summary
31 10/16/2007
• Use of SMDs is Very Popular in MCM/SiP RFIC Designs
• SMD Can Be Modeled and Simulated Well with HFSS and Spice
• Lumped SMD Port Seems Preferable over Lumped RLC
• Lumped SMD Port Bears Intrinsic Inductance, and
Port Aspect Ratio Could Make Difference
• Single-Ended Port with Post Split Can Model SMD Equally Well

Recommendations
• Facilitate Lumped Serial RLC Boundary
• Implement Post Port Split Matrix Operation
• Explore Difference between Lumped Boundary vs. Lumped Port
• Facilitate Voltage Contour in Fields Plot
• Option to Deembed Lumped Port Intrinsic Inductance
–- Name as SMD Port?
32 10/16/2007

Acknowledgement
33 10/16/2007
• Special Thanks to Russ Reisner from Skyworks Solutions
for Sharing the Measurement Data and Exploring the
Sample Laminate Design

34 10/16/2007