Ansoft Q3D Extractor

High-Performance High Performance Packaging Designs
Aaron Edwards
Application Engineer
Signal Integrity Tools

Time to Market
� In an attempt by companies to meet time to market demands, redesigning
previously laid out packages is becoming ever more appealing. Some of the
largest packaging companies in the world were obsoleting package designs
in less than 6 months time. Now the push to use off the shelf packages in
conjunction with the ASIC design is crucial to quick turnarounds of designs.
� This presentation will address the design flow of an engineer who is given an
off the shelf package and tasked to redesign it to meet more stringent design
specifications. Using the suite of Ansoft Signal Integrity tools, the engineer
can run simulations that will provide the necessary data to enhance the
package’s performance. The Signal Integrity tools will provide the engineer
the means to analyzing Characteristic Impedance, Loop Inductance, and
spice waveforms, which will provide enough data to make the package
adhere to faster edge rate signals.

The Scenario
� A big ASIC design house is asking Package Company A to
provide them with a package for their layout, and meet their
performance specifications. They want a quick turnaround,
and also a package that will pass their measurement
validation the first time through.
� Management at the Package Company decides to to pull an
off the shelf package to use for the high speed package
design.They will verify through simulation to see if the
package can handle the signal speeds.

� In a presentation given by Leah Miller of LSI Logic named
“Silicon and Flip Chip Package Co-Design from a Packaging
Perspective”

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~~ Joe Engineer was given a
package design and told to
perform various simulations for it

Design Verification List
� Traces have to have Differential Impedance of 100 ohms If not,
fix it
� Report the findings back to management
� If there are any improvements that could be made to optimize the
package, present suggestions
� Spice sub-circuit has to be generated for the ASIC company to
perform system level simulations at 100ps risetimes
� Parasitic characterization has to be performed for every net on the
package
� Spice subcircuit for the traces has to be generated

The Tools Needed to Perform
� Joe is armed with…
� Ansoftlinks 2.2
� Spicelink 5.0 with PEEC
� Optimetrics 2.5
� TPA 4.0
the Task

Cadence APD
.SM3 File
The Ansoft Solution:
Reading Layout into Q3D
Ansoftlinks 2.2

The Ansoft Solution:
Ansoft Q2D Extractor
� Joe was told to verify that the differential pairs were at 100
ohms. Ansoft 2D Extractor can be used to verify the
transmission line characteristic impedance.
� To eliminate redrawing the structure in the 2D Extractor, Joe
can create a 2D cross-section from the 3D drawing. He can
then simply import this cross section into the 2D Extractor
3D
2D

The Ansoft Solution: Ansoft Q2D Extractor
� To determine the if the differential impedance of this these traces is 100
Ohms, Joe will set up and run the nominal problem. Even though he is
optimistic about obtaining 100 Ohm differential impedance from an off-theshelf
package, he only wants to set up the problem once. If the package
traces don’t yield the desired differential impedance he can parameterize the
model to study the effect of varying trace separation and trace width

The Ansoft Solution:
Ansoft 2D Extractor
�The nominal case yields a
differential impedance of 97.4
ohms, it’s close but the parametric
sweep will predict which values will
be needed to achieve exactly 100
ohm differential impedance

The Ansoft Solution:
Ansoft 2D Extractor
The results of the parametric sweep were then
plotted in a graph

The Ansoft Solution
� Joe has completed his first task of determining the Differential
Impedance of the package
� His next task is to see if there are any improvements to be
made on the package to optimize performance.
� He decides to study the Return Path of the package to see
how it effects the Loop Inductance

The Ansoft Solution: Return Path
� Loop Inductance
Ground
Ground
Via
Via

The Ansoft Solution: Return Path
� The Ground Via placement is very important to minimizing the
Return Loop. Using Optimetrics, we can find the best
placement for those vias.

The Ansoft Solution:
Optimetrics 2.5

The Ansoft Solution:
Ansoft Optimetrics 2.5
� Variable: Position of Vias
� Parameters: L1 – Self Inductance of L1 Trace
H1 – Self Inductance of H1 Trace
L22 – Self Inductance of the Ground
L12 – Mutual Inductance between L1
Trace and Ground
H12 – Mutual Inductance between H1
Trace and Ground
� Cost Function: Loop Inductance of each Trace
Loop L1 = L1 + L22 – 2*L12
Lopp H1 = H1 + L22 – 2*H12

The Ansoft Solution:
Ansoft Optimetrics 2.5

The Ansoft Solution:
Ansoft Optimetrics 2.5

The Ansoft Solution:
Ansoft Q3D Extractor
� Once Joe found the optimal place to put the vias, he could
view the Surface current plots. These plots allow Joe to
visualize the current return path, and see where current
crowding is occurring

The Ansoft Solution:
Ansoft Q3D Extractor
Differential Excitation
Single Ended Excitation using
Ground as Return Path

The Ansoft Solution:
Ansoft Q3D Extractor
� Now Joe can generate a PEEC subcircuit for the system level
engineers to use for their system analysis. Since he has
found the design specs that optimize the performance of this
package, he can generate a distributed sub-circuit to see the
signal through the entire signal path

The Ansoft Solution:
Ansoft Q3D Extractor

The Ansoft Solution:
Schematic Capture

The Ansoft Solution:
Ansoft Q3D Extractor
� Happy with the simulation results, Joe tells his layout
engineers to make some minor changes to the existing
package layout.
� The 2D Extractor determined an ideal 100 differential
impedance, while Optimetrics determined an ideal via
spacing.
� The layout engineer made the changes, and then fed the
design back to Joe.
� The last thing Joe needs to perform is the characterization of
every net on the package.

The Ansoft Solution:
Reading Layout into TPA 4.0

The Ansoft Solution:
Ansoft TPA 4.0
� Once the .ANF file is read into TPA, the project
parameters are added.
� Solderball/Solderbump profiles were added to the
project. Via fill was defined, and the layer stackup was
corrected

The Ansoft Solution:
Ansoft TPA 4.0
� After a coupling distance is given, the partitioning algorithm steps
through the entire package and creates 3D models for each and
every net on the package

Ansoft Q3D Extractor
� After the initial setup, Joe was able to let the
program do the full package extraction while he
went home
� When he returned, a fully coupled spice deck of
every net on the package was ready to be shipped
off to the ASIC company for their spice simulations

Design Verification List
� Traces have to have Differential Impedance of 100 ohms
If not, fix it
� Report the findings back to management
� If there are any improvements that could be made to optimize the
package, present suggestions
� Spice sub-circuit has to be generated for the ASIC company to
perform system level simulations at 100ps risetimes
� Parasitic characterization has to be performed for every net on the
package
� Spice subcircuit for the traces has to be generated