4_DC Biasing BJTs - MavDISK
4_DC Biasing BJTs - MavDISK 4_DC Biasing BJTs - MavDISK
4_DC Biasing BJTs 8 of 31 Load-Line Analysis Maximum collector-emitter voltage occurs when IC equals zero. No drop across RC. Maximum current is ICsat = (VCC- 0)/RC Collector-emitter volage equlas zero.
4_DC Biasing BJTs BJT_load_line.obj simulation 9 of 31 I1 0Adc 200mA 100mA Q1 I Q2N2222 0 0Vdc V1 R1 100 I 10Vdc V2 0A 0V IC(Q1) 1V -I(R1) 2V 3V 4V 5V V_V1 6V 7V 8V 9V 10V
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4_<strong>DC</strong> <strong>Biasing</strong> <strong>BJTs</strong><br />
BJT_load_line.obj simulation<br />
9 of 31<br />
I1<br />
0Adc<br />
200mA<br />
100mA<br />
Q1<br />
I<br />
Q2N2222<br />
0<br />
0Vdc<br />
V1<br />
R1<br />
100<br />
I<br />
10Vdc<br />
V2<br />
0A<br />
0V<br />
IC(Q1)<br />
1V<br />
-I(R1)<br />
2V 3V 4V 5V<br />
V_V1<br />
6V 7V 8V 9V 10V
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