"Chapter 1 - The Op Amp's Place in the World" - HTL Wien 10

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External Compensation, Stability, and Performance 7-8 At V CC = 5 V, the phase margin at the 0-dB crossover point is 60°, while it is 30° at V CC = 2.7 V. This translates into an expected overshoot of 18% at V CC = 5 V, and 28% at V CC = 2.7 V. Unfortunately the time response plots are done with 100-pF loading capacitance, hence we can not check our figures very well. The V CC = 2.7 V overshoot is approximately 2%, and it is almost impossible to figure out what the overshoot would have been with a 600 pF loading capacitor. The small-signal pulse response is done with mV-signals, and that is a more realistic measurement than using the full signal swing. Internally compensated op amps are very desirable because they are easy to use, and they do not require external compensation components. Their drawback is that the bandwidth is limited by the internal compensation scheme. The op amp open-loop gain eventually (when it shows up in the loop gain) determines the error in an op amp circuit. In a noninverting buffer configuration, the TL277X is limited to 1% error at 50 kHz (V CC = 2.7 V) because the op amp gain is 40 dB at that point. Circuit designers can play tricks such as bypassing the op amp with a capacitor to emphasize the high-frequency gain, but the error is still 1%. Keep Equation 7–1 in mind because it defines the error. If the TLV277X were not internally compensated, it could be externally compensated for a lower error at 50 kHz because the gain would be much higher. E V IN 1 A 7.3 External Compensation, Stability, and Performance (7–1) Nobody compensates an op amp just because it is there; they have a reason to compensate the op amp, and that reason is usually stability. They want the op amp to perform a function in a circuit where it is potentially unstable. Internally and noninternally compensated op amps are compensated externally because certain circuit configurations do cause oscillations. Several potentially unstable circuit configurations are analyzed in this section, and the reader can extend the external compensation techniques as required. Other reasons for externally compensating op amps are noise reduction, flat amplitude response, and obtaining the highest bandwidth possible from an op amp. An op amp generates noise, and noise is generated by the system. The noise contains many frequency components, and when a high-pass filter is incorporated in the signal path, it reduces high frequency noise. Compensation can be employed to roll off the op amp’s high frequency, closed-loop response, thus causing the op amp to act as a noise filter. Internally compensated op amps are modeled with a second order equation, and this means that the output voltage can overshoot in response to a step input. When this overshoot (or peaking) is undesirable, external compensation can increase the phase margin to 90° where there is no peaking. An uncompensated op amp has the highest bandwidth possible. External compensation is required to stabilize uncompensated op amps, but the compensation can be tailored to the specific circuit, thus yielding the highest possible bandwidth consistent with the pulse response requirements.
7.4 Dominant-Pole Compensation Dominant-Pole Compensation We saw that capacitive loading caused potential instabilities, thus an op amp loaded with an output capacitor is a circuit configuration that must be analyzed. This circuit is called dominant pole compensation because if the pole formed by the op amp output impedance and the loading capacitor is located close to the zero frequency axis, it becomes dominant. The op amp circuit is shown in Figure 7–8, and the open loop circuit used to calculate the loop gain (Aβ) is shown in Figure 7–9. VIN ∆V POINT X Figure 7–8. Capacitively-Loaded Op Amp v(Test) = ∆VA + – ZO ∆VA ZO CL VOUT ZF ZF ZG ZG CL V(Return) VOUT Figure 7–9. Capacitively-Loaded Op Amp With Loop Broken for Loop Gain (Aβ) Calculation The analysis starts by looking into the capacitor and taking the Thevenin equivalent circuit. V TH Z TH Va Z O C L s 1 Z O Z O C L s 1 Then the output equation is written. Voltage-Feedback Op Amp Compensation (7–2) (7–3) 7-9
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Operational Amplifier Chapter 1: Th
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1-2 problem. It seems that circuits
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1-4 you are looking in the wrong pl
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Laws of Physics 2-2 V IR (2-1) In
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Current Divider Rule 2-4 put voltag
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Thevenin’s Theorem 2-6 V theorem
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Superposition 2.6 Superposition 2-8
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Transistor Amplifier 2-10 I C I B
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Transistor Amplifier 2-12 approxima
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Ideal Op Amp Assumptions 3-2 a hard
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The Inverting Op Amp 3-4 in a curre
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The Differential Amplifier 3.5 The
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Complex Feedback Networks 3-8 Break
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Capacitors Figure 3-10. Low-Pass Fi
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3-12
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Single Supply versus Dual Supply 4-
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Circuit Analysis 4-4 VREF VIN Figur
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Page 40 and 41: Simultaneous Equations 4-10 VOUT V
Page 42 and 43: Simultaneous Equations 4-12 VIN = 0
Page 44 and 45: Simultaneous Equations 4-14 m R F
Page 46 and 47: Simultaneous Equations 4.3.3 Case 3
Page 48 and 49: Simultaneous Equations 4-18 - Input
Page 50 and 51: Simultaneous Equations 4-20 |b| V
Page 52 and 53: Summary 4.4 Summary 4-22 Single-sup
Page 54 and 55: Block Diagram Math and Manipulation
Page 56 and 57: Block Diagram Math and Manipulation
Page 58 and 59: Feedback Equation and Stability 5.3
Page 60 and 61: Bode Analysis of Feedback Circuits
Page 62 and 63: Bode Analysis of Feedback Circuits
Page 64 and 65: Loop Gain Plots are the Key to Unde
Page 66 and 67: Loop Gain Plots are the Key to Unde
Page 68 and 69: References 5-16 M tangent 1 (2) (
Page 70 and 71: Review of the Canonical Equations 6
Page 72 and 73: Review of the Canonical Equations 6
Page 74 and 75: Inverting Op Amps 6-6 comparison al
Page 76 and 77: Differential Op Amps 6.5 Differenti
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Page 82 and 83: Internal Compensation 7-4 Damping R
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Page 88 and 89: Dominant-Pole Compensation 7-10 VTH
Page 90 and 91: Gain Compensation 7-12 VOUT VIN a
Page 92 and 93: Lead Compensation 7-14 transfer fun
Page 94 and 95: Compensated Attenuator Applied to O
Page 96 and 97: Lead-Lag Compensation 7-18 FHASE (A
Page 98 and 99: Comparison of Compensation Schemes
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Page 102 and 103: Development of the Stability Equati
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Page 106 and 107: The Inverting CFA 8-6 The current e
Page 108 and 109: Stability Analysis 8-8 The plot in
Page 110 and 111: Selection of the Feedback Resistor
Page 112 and 113: Stability and Feedback Capacitance
Page 114 and 115: Summary 8.11 Summary 8-14 A Z1 R
Page 116 and 117: Precision 9.2 Precision 9-2 The lon
Page 118 and 119: Bandwidth 9-4 A aR G R F R G (9-2
Page 120 and 121: Stability 9.4 Stability 9-6 Substit
Page 122 and 123: Equation Comparison 9-8 R G = 100
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Page 126 and 127: Characterization 10-2 Noise Signal
Page 128 and 129: Types of Noise 10.2.5 Noise Units 1
Page 130 and 131: Types of Noise 10-6 Shot noise is
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Page 134 and 135: Noise Colors Figure 10-4. Avalanche
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Op Amp Noise 10.4.3 Red/Brown Noise
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Op Amp Noise 10-14 E n Square it.
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Op Amp Noise 10.5.4 Inverting Op Am
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Op Amp Noise 10.5.6 Differential Op
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Putting It All Together 10-20 Vn Vn
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Putting It All Together 10-22 volta
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10-24
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Operational Amplifier Parameter Glo
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Additional Parameter Information 11
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12-2 The ADC selection is based on
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12-4 (A) 4 V 3 V ADC 0 V Sensor Out
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12.2 Transducer Types 12-6 This is
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12-8 some value, and R X is switche
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12-10 Resolvers and synchros are po
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12-12 6) Scan the transducer and AD
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12-14 the worst case excursions of
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Table 12-3. Op Amp Selection 12-16
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12-18 this yields m = 16.16. The re
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12-20 0.97R 1 VREF(MIN) VREF 50 m
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12-22 ply contribution is reduced b
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12-24
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Wireless Systems 13-2 Signal @ - 10
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Wireless Systems 13-4 900 MHz Figur
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Selection of ADCs/DACs 13.3 Selecti
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Selection of ADCs/DACs 13-8 Therefo
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Factors Influencing the Choice of O
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Anti-Aliasing Filters 13-12 anti-al
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Communication D/A Converter Reconst
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External Vref Circuits for ADCs/DAC
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High-Speed Analog Input Drive Circu
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High-Speed Analog Input Drive Circu
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References 13.9 References 13-22 [1
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Understanding the D/A Converter and
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Understanding the D/A Converter and
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D/A Converter Error Budget 14-6 rat
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D/A Converter Error Budget 14-8 The
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D/A Converter Errors and Parameters
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Compensating For DAC Capacitance 14
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Increasing Op Amp Buffer Amplifier
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Increasing Op Amp Buffer Amplifier
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14-24
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Requirements for Oscillation 15-2 u
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Gain in the Oscillator 15-4 The fre
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Active Element (Op Amp) Impact on t
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Analysis of the Oscillator Operatio
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Sine Wave Oscillator Circuits 15-10
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References 15.8 References 15-22 [1
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Fundamentals of Low-Pass Filters 16
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Low-Pass Filter Design 16-12 1st or
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Low-Pass Filter Design Example 16-1
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Low-Pass Filter Design 16-16 In ord
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Low-Pass Filter Design 16.3.2.2 Mul
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Low-Pass Filter Design Second Filte
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High-Pass Filter Design 16-22 |A|
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High-Pass Filter Design 16-24 To di
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High-Pass Filter Design 16-26 Throu
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Band-Pass Filter Design 16-28 |A| [
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Band-Pass Filter Design 16-30 The g
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Band-Pass Filter Design 16-32 out a
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Band-Pass Filter Design 16-34 After
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Band-Rejection Filter Design 16-36
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All-Pass Filter Design 16-42 2 i
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All-Pass Filter Design 16.7.1 First
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All-Pass Filter Design 16-46 V IN f
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Practical Design Hints 16-48 low-pa
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Practical Design Hints V IN 16-50 C
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Practical Design Hints 16-52 If thi
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Practical Design Hints 16-54 f T 1
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Filter Coefficient Tables Table 16-
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16-64
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General Considerations 17.1.3 Noise
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PCB Mechanical Construction 17-4 Te
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PCB Mechanical Construction 17.2.2.
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Grounding 17-8 DIGITAL + DIGITAL -
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Grounding 17-10 CONNECTOR POWER SUP
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The Frequency Characteristics of Pa
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Decoupling 17-20 For example, a 0.4
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Decoupling 17-22 EQUIVALENT SERIES
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Packages 17.7 Packages 17-24 N1 IN-
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Packages 17-26 IN1 + OUT1 IN2 IN3 O
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Summary 17-28 HALF SUPPLY GOOD _ +
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17-30
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Introduction 18-2 swing at V CC = 5
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Dynamic Range 18-4 VIN VnR Figure 1
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Input Common-Mode Range 18-6 sible
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Input Common-Mode Range 18-8 VCC GN
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Input Common-Mode Range 18-10 V µ
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Shutdown and Low Current Drain 18-1
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Transducer to ADC Analog Interface
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DAC to Actuator Analog Interface 18
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DAC to Actuator Analog Interface 18
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Comparison of Op Amps 18-20 When DA
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Summary 18.11 Summary 18-22 Always
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"Chapter 1 - The Op Amp's Place in the World" - HTL Wien 10

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