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"Chapter 1 - The Op Amp's Place in the World" - HTL Wien 10

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<strong>The</strong> Frequency Characteristics of Passive Components<br />

between <strong>the</strong>m (Figure 17–13). <strong>The</strong> formulas for <strong>the</strong>se parasitic effects can be found <strong>in</strong><br />

transmission l<strong>in</strong>e and/or microstrip references, but are too complex for <strong>in</strong>clusion here.<br />

Figure 17–13. Coupl<strong>in</strong>g Between Parallel Signal Traces<br />

17.4.4.4 Inductive Vias<br />

Signal l<strong>in</strong>es should not be routed parallel to each o<strong>the</strong>r, unless transmission l<strong>in</strong>e or microstrip<br />

effects are desired. O<strong>the</strong>rwise, a gap of at least three times <strong>the</strong> signal trace width<br />

should be ma<strong>in</strong>ta<strong>in</strong>ed.<br />

Capacitance between traces <strong>in</strong> an analog design can become a problem if fixed resistors<br />

<strong>in</strong> <strong>the</strong> design are large (several MΩ). Capacitance between <strong>the</strong> <strong>in</strong>vert<strong>in</strong>g and non<strong>in</strong>vert<strong>in</strong>g<br />

<strong>in</strong>puts of an op amp could easily cause oscillation.<br />

Whenever rout<strong>in</strong>g constra<strong>in</strong>ts force a via (connection between layers of a PCB, FIgure<br />

17–14), a parasitic <strong>in</strong>ductor is also formed. At a given diameter (d) <strong>the</strong> approximate <strong>in</strong>ductance<br />

(L) of an via at a height of (h) may be calculated as follows:<br />

L h<br />

5<br />

h (mm)<br />

TRACE<br />

1 ln 4h<br />

d<br />

d (mm)<br />

Figure 17–14. Via Inductance Measurements<br />

nH<br />

TOP LAYER<br />

BOTTOM LAYER<br />

TRACE<br />

Circuit Board Layout Techniques<br />

(17–5)<br />

17-19

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