"Chapter 1 - The Op Amp's Place in the World" - HTL Wien 10

Grounding
components carefully if there are high-speed digital traces running right next to the
sensitive analog traces. Digital signals must be routed around analog circuitry, and
not overlap analog ground and power planes. If not, the design will include a new
schematic symbol shown in Figure 17–4 — the broadcasting antenna!
Most digital clocks are high enough in frequency that even small capacitances
between traces and planes can couple significant noise. Remember that it is not only
the fundamental frequency of the clock that can cause a potential problem, but also
the higher frequency harmonics.
ANALOG
GROUND
PLANE
DIGITAL
GROUND
PLANE
HIGH-IMPEDANCE
ANALOG INPUT
Figure 17–4. Broadcasting From PCB Traces
17.3.3 A Good Example
HIGH-SPEED DIGITAL SIGNAL
It is a good idea to locate analog circuitry as close as possible to the I/O connections
of the board. Digital designers, used to high current ICs, will be tempted to make a
50-mil trace run several inches to the analog circuitry thinking that reducing the
resistance in the trace will help get rid of noise. What they have actually done is
create a long, skinny capacitor that couples noise from digital ground and power
planes into the op amp, making the problem worse!
Figure 17–5 shows one possible board layout. In this system, all electronics, including the
power supply, reside on one PCB. Three separate and isolated ground/power planes are
employed: one for power, one for digital, and one for analog. Power and ground connections
from digital and analog sections of the board are combined only in the supply section,
and are combined in close proximity. High-frequency conducted noise on the power
lines is limited by inductors (chokes). In this case, the designer has even located low frequency
analog circuitry close to low speed digital, keeping high frequency digital and analog
physically apart on the board. This is a good, careful design that has a high likelihood
of success — providing that good layout and decoupling rules are also followed.
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Circuit Board Layout Techniques
17-9