"Chapter 1 - The Op Amp's Place in the World" - HTL Wien 10

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Operational Amplifier Parameter Glossary 11-6 PARAMETER ABBV UNITS DEFINITION INFO Temperature coefficient of input offset voltage Total current into VCC+/ VDD+ Total current out of VDD– αVIO µV/°C mA mA Total harmonic distortion THD dB Total harmonic distortion plus noise THD+N dB Total power dissipation PD mW Turn-on voltage (shutdown) Turn-off voltage (shutdown) VIH– SHDN VIL– SHDN Turn-on time (shutdown) tEN µs Turn-off time (shutdown) tDIS µs Unity gain bandwidth B1 MHz Table 11–2. Cross-Reference of Op Amp Parameters V V The ratio of the change in input offset voltage to the change in free-air temperature. This is an average value for the specified temperature range. Maximum current that can be supplied to the positive power terminal of the op amp — usually specified as an absolute maximum. Maximum current that can be drawn from the negative power terminal of the op amp — usually specified as an absolute maximum. The ratio of the RMS voltage of the first nine harmonics of the fundamental signal to the total RMS voltage at the output. The ratio of the RMS noise voltage and RMS harmonic voltage of the fundamental signal to the total RMS voltage at the output. The total dc power supplied to the device less any power delivered from the device to a load. Note: At no load: PD = VCC+ × I or PD = VDD+ × I The voltage required on the shutdown pin to turn the device on. The voltage required on the shutdown pin to turn the device off. The time from when the turn-on voltage is applied to the shutdown pin to when the supply current has reached half of its final value. The time from when the turn-off voltage is applied to the shutdown pin to when the supply current has reached half of its final value. The range of frequencies within which the open-loop voltage amplification is greater that unity. ABBV PARAMETER αIIO ∆VCC±/ ∆VDD± αVIO ∆VIO AD Am AOL AV AVD Temperature coefficient of input offset current Supply voltage sensitivity Temperature coefficient of input offset voltage Supply voltage sensitivity Differential gain error Gain margin Open loop voltage gain Large-signal voltage amplification Differential voltage amplification 11.3.1 11.3.14 11.3.15
ABBV PARAMETER B1 Unity gain bandwidth BOM Maximum-output-swing bandwidth ci Input capacitance Cic Common-mode input capacitance CMRR Common-mode rejection ratio GBW Gain bandwidth product ICC–SHDN/ IDD–SHDN Supply current (shutdown) ICC/IDD Supply current II Input current IIB Input bias current IIO Input offset current In Input noise current IO Output current IOL Low-level output current IOS Short-circuit output current kCMR Common-mode rejection ratio kSVR Supply rejection ratio kSVS Supply voltage sensitivity NF Noise figure PD Total power dissipation PSRR Power supply rejection ratio ri Input resistance Rid Differential input resistance Ro Output resistance Rt Open-loop transresistance SR Slew rate TA Operating temperature tDIS Turn-off time (shutdown) tEN Turn-on time (shutdown) THD Total harmonic distortion tf Fall time THD+N Total harmonic distortion plus noise tr Rise time ts Settling time TS Storage temperature VCC/VDD Supply voltage VI VIC VICR Input voltage range Common-mode input voltage Input common-mode voltage range Operational Amplifier Parameter Glossary Understanding Op Amp Parameters 11-7
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Operational Amplifier Chapter 1: Th
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1-2 problem. It seems that circuits
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1-4 you are looking in the wrong pl
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Laws of Physics 2-2 V IR (2-1) In
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Current Divider Rule 2-4 put voltag
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Thevenin’s Theorem 2-6 V theorem
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Superposition 2.6 Superposition 2-8
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Transistor Amplifier 2-10 I C I B
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Transistor Amplifier 2-12 approxima
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Ideal Op Amp Assumptions 3-2 a hard
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The Inverting Op Amp 3-4 in a curre
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The Differential Amplifier 3.5 The
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Complex Feedback Networks 3-8 Break
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Capacitors Figure 3-10. Low-Pass Fi
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3-12
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Single Supply versus Dual Supply 4-
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Circuit Analysis 4-4 VREF VIN Figur
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Circuit Analysis 4-6 Four op amps w
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Simultaneous Equations 4.3 Simultan
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Simultaneous Equations 4-10 VOUT V
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Simultaneous Equations 4-12 VIN = 0
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Simultaneous Equations 4-14 m R F
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Simultaneous Equations 4.3.3 Case 3
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Simultaneous Equations 4-18 - Input
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Simultaneous Equations 4-20 |b| V
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Summary 4.4 Summary 4-22 Single-sup
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Block Diagram Math and Manipulation
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Block Diagram Math and Manipulation
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Feedback Equation and Stability 5.3
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Bode Analysis of Feedback Circuits
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Bode Analysis of Feedback Circuits
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Loop Gain Plots are the Key to Unde
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Loop Gain Plots are the Key to Unde
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References 5-16 M tangent 1 (2) (
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Review of the Canonical Equations 6
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Review of the Canonical Equations 6
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Inverting Op Amps 6-6 comparison al
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Differential Op Amps 6.5 Differenti
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6-10
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Internal Compensation 7-2 around in
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Internal Compensation 7-4 Damping R
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Internal Compensation AVD - Large-S
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External Compensation, Stability, a
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Dominant-Pole Compensation 7-10 VTH
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Gain Compensation 7-12 VOUT VIN a
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Lead Compensation 7-14 transfer fun
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Compensated Attenuator Applied to O
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Lead-Lag Compensation 7-18 FHASE (A
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Comparison of Compensation Schemes
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7-22
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Development of the Stability Equati
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Page 106 and 107: The Inverting CFA 8-6 The current e
Page 108 and 109: Stability Analysis 8-8 The plot in
Page 110 and 111: Selection of the Feedback Resistor
Page 112 and 113: Stability and Feedback Capacitance
Page 114 and 115: Summary 8.11 Summary 8-14 A Z1 R
Page 116 and 117: Precision 9.2 Precision 9-2 The lon
Page 118 and 119: Bandwidth 9-4 A aR G R F R G (9-2
Page 120 and 121: Stability 9.4 Stability 9-6 Substit
Page 122 and 123: Equation Comparison 9-8 R G = 100
Page 124 and 125: 9-10
Page 126 and 127: Characterization 10-2 Noise Signal
Page 128 and 129: Types of Noise 10.2.5 Noise Units 1
Page 130 and 131: Types of Noise 10-6 Shot noise is
Page 132 and 133: Types of Noise 10-8 Ith 4kTB R Wh
Page 134 and 135: Noise Colors Figure 10-4. Avalanche
Page 136 and 137: Op Amp Noise 10.4.3 Red/Brown Noise
Page 138 and 139: Op Amp Noise 10-14 E n Square it.
Page 140 and 141: Op Amp Noise 10.5.4 Inverting Op Am
Page 142 and 143: Op Amp Noise 10.5.6 Differential Op
Page 144 and 145: Putting It All Together 10-20 Vn Vn
Page 146 and 147: Putting It All Together 10-22 volta
Page 148 and 149: 10-24
Page 150 and 151: Operational Amplifier Parameter Glo
Page 152 and 153: Operational Amplifier Parameter Glo
Page 156 and 157: Additional Parameter Information 11
Page 172 and 173: 12-2 The ADC selection is based on
Page 174 and 175: 12-4 (A) 4 V 3 V ADC 0 V Sensor Out
Page 176 and 177: 12.2 Transducer Types 12-6 This is
Page 178 and 179: 12-8 some value, and R X is switche
Page 180 and 181: 12-10 Resolvers and synchros are po
Page 182 and 183: 12-12 6) Scan the transducer and AD
Page 184 and 185: 12-14 the worst case excursions of
Page 186 and 187: Table 12-3. Op Amp Selection 12-16
Page 188 and 189: 12-18 this yields m = 16.16. The re
Page 190 and 191: 12-20 0.97R 1 VREF(MIN) VREF 50 m
Page 192 and 193: 12-22 ply contribution is reduced b
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Page 196 and 197: Wireless Systems 13-2 Signal @ - 10
Page 198 and 199: Wireless Systems 13-4 900 MHz Figur
Page 200 and 201: Selection of ADCs/DACs 13.3 Selecti
Page 202 and 203: Selection of ADCs/DACs 13-8 Therefo
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Factors Influencing the Choice of O
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Anti-Aliasing Filters 13-12 anti-al
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Communication D/A Converter Reconst
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External Vref Circuits for ADCs/DAC
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High-Speed Analog Input Drive Circu
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High-Speed Analog Input Drive Circu
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References 13.9 References 13-22 [1
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Understanding the D/A Converter and
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Understanding the D/A Converter and
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D/A Converter Error Budget 14-6 rat
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D/A Converter Error Budget 14-8 The
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D/A Converter Errors and Parameters
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Compensating For DAC Capacitance 14
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Increasing Op Amp Buffer Amplifier
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Increasing Op Amp Buffer Amplifier
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14-24
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Requirements for Oscillation 15-2 u
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Gain in the Oscillator 15-4 The fre
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Active Element (Op Amp) Impact on t
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Analysis of the Oscillator Operatio
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Sine Wave Oscillator Circuits 15-10
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References 15.8 References 15-22 [1
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Fundamentals of Low-Pass Filters 16
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Low-Pass Filter Design 16-12 1st or
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Low-Pass Filter Design Example 16-1
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Low-Pass Filter Design 16-16 In ord
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Low-Pass Filter Design 16.3.2.2 Mul
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Low-Pass Filter Design Second Filte
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High-Pass Filter Design 16-22 |A|
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High-Pass Filter Design 16-24 To di
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High-Pass Filter Design 16-26 Throu
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Band-Pass Filter Design 16-28 |A| [
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Band-Pass Filter Design 16-30 The g
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Band-Pass Filter Design 16-32 out a
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Band-Pass Filter Design 16-34 After
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Band-Rejection Filter Design 16-36
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All-Pass Filter Design 16-42 2 i
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All-Pass Filter Design 16.7.1 First
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All-Pass Filter Design 16-46 V IN f
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Practical Design Hints 16-48 low-pa
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Practical Design Hints V IN 16-50 C
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Practical Design Hints 16-52 If thi
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Practical Design Hints 16-54 f T 1
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Filter Coefficient Tables Table 16-
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16-64
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General Considerations 17.1.3 Noise
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PCB Mechanical Construction 17-4 Te
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PCB Mechanical Construction 17.2.2.
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Grounding 17-8 DIGITAL + DIGITAL -
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Grounding 17-10 CONNECTOR POWER SUP
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The Frequency Characteristics of Pa
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Decoupling 17-20 For example, a 0.4
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Decoupling 17-22 EQUIVALENT SERIES
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Packages 17.7 Packages 17-24 N1 IN-
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Packages 17-26 IN1 + OUT1 IN2 IN3 O
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Summary 17-28 HALF SUPPLY GOOD _ +
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17-30
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Introduction 18-2 swing at V CC = 5
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Dynamic Range 18-4 VIN VnR Figure 1
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Input Common-Mode Range 18-6 sible
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Input Common-Mode Range 18-8 VCC GN
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Input Common-Mode Range 18-10 V µ
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Shutdown and Low Current Drain 18-1
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Transducer to ADC Analog Interface
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DAC to Actuator Analog Interface 18
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DAC to Actuator Analog Interface 18
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Comparison of Op Amps 18-20 When DA
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Summary 18.11 Summary 18-22 Always
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18-24
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"Chapter 1 - The Op Amp's Place in the World" - HTL Wien 10

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