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"Chapter 1 - The Op Amp's Place in the World" - HTL Wien 10

"Chapter 1 - The Op Amp's Place in the World" - HTL Wien 10

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Table 8–1. Data Set for Curves <strong>in</strong> Figure 8–7<br />

GAIN (ACL) RF (Ω) BANDWIDTH (MHz)<br />

+ 1 <strong>10</strong>00 125<br />

+ 2 681 95<br />

+ <strong>10</strong> 383 65<br />

Stability and Input Capacitance<br />

Enter <strong>the</strong> graph at <strong>the</strong> new ga<strong>in</strong>, say A CL = 6, and move horizontally until you reach <strong>the</strong><br />

<strong>in</strong>tersection of <strong>the</strong> ga<strong>in</strong> versus feedback resistance curve. <strong>The</strong>n drop vertically to <strong>the</strong> resistance<br />

axis and read <strong>the</strong> new value of R F (500 Ω <strong>in</strong> this example). Enter <strong>the</strong> graph at<br />

<strong>the</strong> new value of R F, and travel vertically until you <strong>in</strong>tersect <strong>the</strong> bandwidth versus feedback<br />

resistance curve. Now move to <strong>the</strong> bandwidth axis to read <strong>the</strong> new bandwidth (75 MHz<br />

<strong>in</strong> this example). As a start<strong>in</strong>g po<strong>in</strong>t you should expect to get approximately 75 MHz BW<br />

with a ga<strong>in</strong> of 6 and R F = 500 Ω. Although this technique yields more reliable solutions<br />

than Equation 8–27 does, op amp peculiarities, circuit board stray capacitances, and wir<strong>in</strong>g<br />

make extensive test<strong>in</strong>g mandatory. <strong>The</strong> circuit must be tested for performance and<br />

stability at each new operat<strong>in</strong>g po<strong>in</strong>t.<br />

8.8 Stability and Input Capacitance<br />

When designer lets <strong>the</strong> circuit board <strong>in</strong>troduce stray capacitance on <strong>the</strong> <strong>in</strong>vert<strong>in</strong>g <strong>in</strong>put<br />

node to ground, it causes <strong>the</strong> impedance Z G to become reactive. <strong>The</strong> new impedance,<br />

Z G, is given <strong>in</strong> Equation 8–28, and Equation 8–29 is <strong>the</strong> stability equation that describes<br />

<strong>the</strong> situation.<br />

Z G <br />

A <br />

ZB <br />

R G<br />

1 R G C G s<br />

Z<br />

Z F<br />

Z 2<br />

G Z B Z G<br />

A <br />

Z<br />

RF1 RB R<br />

R B RF RGCGs FRG1 Current-Feedback <strong>Op</strong> Amp Analysis<br />

(8–28)<br />

(8–29)<br />

(8–30)<br />

Equation 8–29 is <strong>the</strong> stability equation when Z G consists of a resistor <strong>in</strong> parallel with stray<br />

capacitance between <strong>the</strong> <strong>in</strong>vert<strong>in</strong>g <strong>in</strong>put node and ground. <strong>The</strong> stray capacitance, C G, is<br />

a fixed value because it is dependent on <strong>the</strong> circuit layout. <strong>The</strong> pole created by <strong>the</strong> stray<br />

capacitance is dependent on R B because it dom<strong>in</strong>ates R F and R G. R B fluctuates with<br />

manufactur<strong>in</strong>g tolerances, so <strong>the</strong> R BC G pole placement is subject to IC manufactur<strong>in</strong>g tolerances.<br />

As <strong>the</strong> R BC G comb<strong>in</strong>ation becomes larger, <strong>the</strong> pole moves towards <strong>the</strong> zero fre-<br />

8-11

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