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"Chapter 1 - The Op Amp's Place in the World" - HTL Wien 10

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<strong>The</strong> Non<strong>in</strong>vert<strong>in</strong>g CFA<br />

Figure 8–4. Non<strong>in</strong>vert<strong>in</strong>g CFA<br />

8-4<br />

VIN<br />

ZG<br />

+<br />

–<br />

G = 1<br />

ZB<br />

I<br />

VA<br />

IZ<br />

+<br />

ZF<br />

G = 1<br />

VOUT<br />

Equation 8–6 is <strong>the</strong> transfer equation, Equation 8–7 is <strong>the</strong> current equation at <strong>the</strong> <strong>in</strong>vert<strong>in</strong>g<br />

node, and Equation 8–8 is <strong>the</strong> <strong>in</strong>put loop equation. <strong>The</strong>se equations are comb<strong>in</strong>ed to yield<br />

<strong>the</strong> closed-loop ga<strong>in</strong> equation, Equation 8–9.<br />

V OUT IZ<br />

I V A<br />

Z G– V OUT –V A<br />

V A V IN –IZ B<br />

V OUT<br />

V IN<br />

<br />

1 <br />

Z F<br />

<br />

Z1 ZF ZG ZF1 ZB ZFZG Z<br />

Z F1 Z B<br />

Z F Z G<br />

(8–6)<br />

(8–7)<br />

(8–8)<br />

(8–9)<br />

When <strong>the</strong> <strong>in</strong>put buffer output impedance, Z B, approaches zero, Equation 8–9 reduces to<br />

Equation 8–<strong>10</strong>.

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