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SENSORLESS FIELD ORIENTED CONTROL OF BRUSHLESS ...

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was fed to the SVM inverter as a SV). The SVM inverter is a 180° inverter with the same<br />

allowable states as a PWM inverter. SVM is simply a method of controlling the inverter as a<br />

whole rather than controlling each phase leg independently. Even though the method of control is<br />

radically different, it is still a pulse width modulator and for this reason it is sometimes called<br />

space vector PWM (SVPWM). Figure 4.28 is redrawn as Figure 4.29 without the circular<br />

trajectories shown and the sextants have been labeled.<br />

Figure 4.29 – Base SVs.<br />

The figure shows all the possible SVs but of course, only one SV can be asserted at one time. In<br />

SVM, one base SV is asserted for a period of time, another for a different period of time, and so<br />

on. There are different implementations but there are two obvious minimum requirements. First,<br />

the only way to synthesize a time-average SV is to switch between two active base SVs. Second,<br />

the only way to control the magnitude of the synthesized time-average SV is to switch between<br />

null and active base SVs. Thus the general SVM algorithm is to switch between two active and at<br />

least one null base SVs during one switching period. Like regular PWM, the switching period<br />

may be selected arbitrarily, although there are many practical limits. The SVM synthesis of a<br />

time-average SV S is shown in Figure 4.30. Simple as it is, the figure is somewhat deceiving. It<br />

shows the time-average SV S as being composed of two vectors aligned with the base SVs. But<br />

the two shorter SVs do not exist—they are time-averages as well. In reality, one active base SV is<br />

asserted, then the other active base SV, then the null base SV, and the cycle repeats (as will be<br />

shown later). Thus, the magnitude of each shorter SV represents the duty cycle of that active SV.<br />

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