Manual CEPR 96 - Balogh technical center
Manual CEPR 96 - Balogh technical center Manual CEPR 96 - Balogh technical center
Manuel instructions CEPR96 / MRUC20 M96.40.02 SYNTAX Hexadecimal : Mnemonic : EXECUTION COMMENTS EXAMPLE BITS SHIFT NC 73 NL NB NR N0 A016 04 ROT,NR,N0,A016. A016 LEFT SHIFT A016+1 RIGHT SHIFT A016+N0 Data table The data table is define by an address and a number of bytes. The address A016 is the MSB of the data table. If NR is beetwen 01H and 7FH : 1 to 127 left shift will be done If NR is beetwen 81H and FFH: 127 to 1 right shift will be done NOTE: If NR = 0 or NR = 80H the instruction is not processing. SYMBOLS DEFINITION LIMITS NR Direction and number of shift to do N Number of bytes for the data table A016 Address of the data table Processing to 10 left shifts on 4 data stored at the address 800h. Mnemonic : ROT,0AH,4,800H. Before After 800H 801H 802H 803H 800H 801H 802H 803H 0 FFH FFH 0 FFH FCH 00 03 PAGE 34 1 to FFH execpt 80H see memory mapping 73H ROT
SYNTAX Hexadecimal : Mnemonic : EXECUTION COMMENTS EXAMPLE BIT MODIFICATION SEPARATED FORMAT NC 1C NL NB AD0 PM0..ADN PMN...04 SET,XA/BC...,XA/BC. MEMORY ACCU./REGISTER ADN PMN SYMBOLS DEFINITION LIMITS * See next page PAGE 35 Manuel instructions CEPR96 / MRUC20 M96.40.02 Accumulator memory or register bit modification for the selected address (ADN) PMN allows to select : - address assignment : Accumultator (D) or register (R) - the bit to modify - the bit value ADN addresse containing value to be modified PMN* modification parameter for the value X "D":accumulator "R":general register "X":CAN 0 register "Y":CAN 1 register A offset in the ACCU. or register number B bit number (0 :LSB) C set the bit value : 1 => C absent 0 => C = "_" (under score) Set the bit #4 of output port PS1 to on. AD0 : register #2 to select the PS1 port PM0: b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 0 1 1 0 0 CAN selection not used register selection bit value select the bit #4 Hexadecimal : 01 1C 10 07 02 0C 04 Mnemonic : SET,R2/4 . 0 à FFH 0 à 1FH D, R, X, Y 0 à 255 0 à 7 1CH SET Other examples (mnemonic) set the bit #5 of the outputs to OFF SET,R2/5_. set the bit #0 of the address 10 to ON SET,D10/0. Set the bit #7 of the address 10 to OFF SET,D10/7_. Set the bit #7 of the register #0 of the CAN 0 register SET,X0/7. Set the bit #4 of the register #10H of the CAN 1 register SET,Y10H/4_.
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- Page 67 and 68: SYNTAX STATEMENT OF MRER21 MODULES
SYNTAX<br />
Hexadecimal :<br />
Mnemonic :<br />
EXECUTION<br />
COMMENTS<br />
EXAMPLE<br />
BIT MODIFICATION<br />
SEPARATED FORMAT<br />
NC 1C NL NB AD0 PM0..ADN PMN...04<br />
SET,XA/BC...,XA/BC.<br />
MEMORY<br />
ACCU./REGISTER<br />
ADN PMN<br />
SYMBOLS DEFINITION LIMITS<br />
* See next page<br />
PAGE 35<br />
Manuel instructions <strong>CEPR</strong><strong>96</strong> / MRUC20 M<strong>96</strong>.40.02<br />
Accumulator memory or register bit modification for the selected address (ADN)<br />
PMN allows to select :<br />
- address assignment : Accumultator (D) or register (R)<br />
- the bit to modify<br />
- the bit value<br />
ADN addresse containing value to be modified<br />
PMN* modification parameter for the value<br />
X "D":accumulator "R":general register<br />
"X":CAN 0 register "Y":CAN 1 register<br />
A offset in the ACCU. or register number<br />
B bit number (0 :LSB)<br />
C set the bit value : 1 => C absent<br />
0 => C = "_" (under score)<br />
Set the bit #4 of output port PS1 to on.<br />
AD0 : register #2 to select the PS1 port<br />
PM0: b7 b6 b5 b4 b3 b2 b1 b0<br />
0 0 0 0 1 1 0 0<br />
CAN selection<br />
not used<br />
register selection<br />
bit value<br />
select the bit #4<br />
Hexadecimal : 01 1C 10 07 02 0C 04<br />
Mnemonic : SET,R2/4 .<br />
0 à FFH<br />
0 à 1FH<br />
D, R, X, Y<br />
0 à 255<br />
0 à 7<br />
1CH<br />
SET<br />
Other examples (mnemonic)<br />
set the bit #5 of the outputs to OFF<br />
SET,R2/5_.<br />
set the bit #0 of the address 10 to ON<br />
SET,D10/0.<br />
Set the bit #7 of the address 10 to OFF<br />
SET,D10/7_.<br />
Set the bit #7 of the register #0 of the<br />
CAN 0 register<br />
SET,X0/7.<br />
Set the bit #4 of the register #10H of the<br />
CAN 1 register<br />
SET,Y10H/4_.
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