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Xilinx Synthesis Technology User Guide

Xilinx Synthesis Technology User Guide

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Command Line Mode<br />

You can improve the readability of the xst.scr file, especially if you<br />

use many options to run synthesis. You can place each option with its<br />

value on a separate line, respecting the following rules:<br />

• The first line must contain only the run command without any<br />

options.<br />

• There must be no empty lines in the middle of the command.<br />

• Each line (except the first one) must start with a dash (-)<br />

For the previously used command you may have the xst.scr file in the<br />

following form:<br />

run<br />

-ifn watchvhd.vhd<br />

-ifmt VHDL<br />

-ofn watchvhd.ngc<br />

-ofmt NGC<br />

-p xcv50-bg256-6<br />

-opt_mode Speed<br />

-opt_level 1<br />

Case 2: Each Design in a Separate File<br />

For Case 2, each design block is located in a separate VHDL file.<br />

1. Create a new directory, named vhdl_m.<br />

2. Copy the following files from the ISEexamples\watchvhd<br />

directory of the ISE installation directory to the newly created<br />

vhdl_m directory.<br />

♦ stopwatch.vhd<br />

♦ statmach.vhd<br />

♦ decode.vhd<br />

♦ cnt60.vhd<br />

♦ smallcntr.vhd<br />

♦ hex2led.vhd<br />

To synthesize the design, which is now represented by six VHDL<br />

files, use the project approach supported in XST. A VHDL project file<br />

contains a list of VHDL files from the project. The order of the files is<br />

not important. XST is able to recognize the hierarchy, and compile<br />

XST <strong>User</strong> <strong>Guide</strong> 8-17

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