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Xilinx Synthesis Technology User Guide

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XST <strong>User</strong> <strong>Guide</strong><br />

Case Statement<br />

Case statements perform a comparison to an expression to evaluate<br />

one of a number of parallel branches. The case statement evaluates<br />

the branches in the order they are written; the first branch that<br />

evaluates to true is executed. If none of the branches match, the<br />

default branch is executed. Example 6-13 shows the use of a Case<br />

statement.<br />

Example 6-13 MUX Description Using the Case Statement<br />

library IEEE;<br />

use IEEE.std_logic_1164.all;<br />

entity mux4 is<br />

port (a, b, c, d: in std_logic_vector (7 downto 0);<br />

sel: in std_logic_vector (1 downto 0);<br />

outmux: out std_logic_vector (7 downto 0));<br />

end mux4;<br />

architecture behavior of mux4 is<br />

begin<br />

process (a, b, c, d, sel)<br />

begin<br />

case sel is<br />

when "00" => outmux outmux outmux <br />

outmux

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