Technical Product Specification for Canoe Pass - Preminary - Intel
Technical Product Specification for Canoe Pass - Preminary - Intel
Technical Product Specification for Canoe Pass - Preminary - Intel
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
<strong>Intel</strong> ® Server Board S2600CP and <strong>Intel</strong> ® Server System P4000CP Plat<strong>for</strong>m Management<br />
<strong>Intel</strong> ® Server Board S2600CP and Server System P4000CP TPS<br />
5.2.5 Embedded Plat<strong>for</strong>m Debug<br />
The Embedded Plat<strong>for</strong>m Debug feature supports capturing low-level diagnostic data (applicable<br />
MSRs, PCI config-space registers, etc.). This feature allows a user to export this data into a file<br />
that is retrievable via the embedded web GUI, as well as through host and remote IPMI<br />
methods, <strong>for</strong> the purpose of sending to an <strong>Intel</strong> engineer <strong>for</strong> an enhanced debugging capability.<br />
The files are compressed, encrypted, and password protected. The file is not meant to be<br />
viewable by the end user but rather to provide additional debugging capability to an <strong>Intel</strong> support<br />
engineer.<br />
A list of data that may be captured using this feature includes but is not limited to:<br />
56<br />
1. Plat<strong>for</strong>m sensor readings – This includes all “readable” sensors that can be accessed<br />
by the IBMC FW and have associated SDRs populated in the SDR repository. This does<br />
not include any “event-only” sensors. (All BIOS sensors and some IBMC and ME<br />
sensors are “event-only”; meaning that they are not readable using an IPMI Get Sensor<br />
Reading command but rather are used just <strong>for</strong> event logging purposes).<br />
2. SEL – The current SEL contents are saved in both hexadecimal and text <strong>for</strong>mat.<br />
3. CPU/memory register data useful <strong>for</strong> diagnosing the cause of the following<br />
system errors: CATERR, ERR[2], SMI timeout, PERR, and SERR. The debug data is<br />
saved and timestamped <strong>for</strong> the last 3 occurrences of the error conditions.<br />
a. PCI error registers<br />
b. MSR registers<br />
c. MCH registers<br />
4. BMC configuration data<br />
5. BMC FW debug log (that is, SysLog) – Captures FW debug messages.<br />
5.2.6 Data Center Management Interface (DCMI)<br />
The DCMI <strong>Specification</strong> is an emerging standard that is targeted to provide a simplified<br />
management interface <strong>for</strong> Internet Portal Data Center (IPDC) customers. It is expected to<br />
become a requirement <strong>for</strong> server plat<strong>for</strong>ms which are targeted <strong>for</strong> IPDCs. DCMI is an IPMIbased<br />
standard that builds upon a set of required IPMI standard commands by adding a set of<br />
DCMI-specific IPMI OEM commands.<br />
At the time this was written, the current DCMI specification was DCMI 1.0. A DCMI 1.1<br />
specification is expected to be released in Q2 2010 and will include DCMI 1.0 features plus<br />
errata and corrections. The DCMI 1.5 specification builds on the DCMI 1.0/1.1 specifications<br />
and is currently at a draft level (rev0.5). It is not expected to reach rev1.0 until Q2 of 2011.<br />
The current EPSD direction is that the IPDC server segment will be supported on EPSD<br />
products by implementing the mandatory features in the IBMC FW (DCMI 1.0 compliance <strong>for</strong><br />
Bromolow and DCMI 1.5-compliance <strong>for</strong> Romley).<br />
5.2.7 Local Directory Authentication Protocol (LDAP)<br />
The Lightweight Directory Access Protocol (LDAP) is an application protocol supported by the<br />
IBMC <strong>for</strong> the purpose of authentication and authorization. The IBMC user connects with an<br />
<strong>Intel</strong> Confidential Revision 0.8<br />
<strong>Intel</strong> order number G26942-003