Technical Product Specification for Canoe Pass - Preminary - Intel

Intel® Server Board S2600CP Functional Architecture Intel ® Server Board S2600CP and Server System P4000CP TPS
4.3.18 System Management Bus (SMBus 2.0)
The Patsburg chipset contains a SMBus Host interface that allows the processor to
communicate with SMBus slaves. This interface is compatible with most I2C devices. Special
I2C commands are implemented.
The Patsburg chipset’s SMBus host controller provides a mechanism for the processor to
initiate communications with SMBus peripherals (slaves). Also, the Patsburg chipset supports
slave functionality, including the Host Notify protocol. Hence, the host controller supports eight
command protocols of the SMBus interface (see System Management Bus (SMBus)
Specification, Version 2.0): Quick Command, Send Byte, Receive Byte, Write Byte/Word, Read
Byte/Word, Process Call, Block Read/Write, and Host Notify.
The Patsburg chipset’s SMBus also implements hardware-based Packet Error Checking for
data robustness and the Address Resolution Protocol (ARP) to dynamically provide address to
all SMBus devices.
4.3.19 Integrated NVSRAM controller
The Patsburg chipset has an integrated NVSRAM controller that supports up to 32KB external
device. The host processor can read and write data to the NVSRAM component.
4.3.20 Virtualization Technology for Directed I/O (Intel ® VT-d)
The Patsburg chipset provides hardware support for implementation of Intel ® Virtualization
Technology with Directed I/O (Intel ® VT-d). Intel VT-d consists of technology components that
support the virtualization of platforms based on Intel ® Architecture Processors. Intel VT-d
Technology enables multiple operating systems and applications to run in independent
partitions. A partition behaves like a virtual machine (VM) and provides isolation and protection
across partitions. Each partition is allocated its own subset of host physical memory.
4.3.21 JTAG Boundary-Scan
The Patsburg chipset adds the industry standard JTAG interface and enables Boundary-Scan in
place of the XOR chains used in previous generations of chisets. Boundary-Scan can be used
to ensure device connectivity during the board manufacturing process. The JTAG interface
allows system manufacturers to improve efficiency by using industry available tools to test the
Patsburg chipset on an assembled board. Since JTAG is a serial interface, it eliminates the
need to create probe points for every pin in an XOR chain. This eases pin breakout and trace
routing and simplifies the interface between the system and a bed-of-nails tester.
4.3.22 KVM/Serial Over Lan (SOL) Function
These functions support redirection of keyboard, mouse, and text screen to a terminal window
on a remote console. The keyboard, mouse, and text redirection enables the control of the client
machine through the network. Text, mouse, and keyboard redirection allows the remote
machine to control and configure the client by entering BIOS setup. The KVM/SOL function
emulates a standard PCI serial port and redirects the data from the serial port to the
management console using LAN. KVM has additional requirements of internal graphics and
SOL may be used when KVM is not supported.
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Intel Confidential Revision 0.8
Intel order number G26942-003