Technical Product Specification for Canoe Pass - Preminary - Intel
Technical Product Specification for Canoe Pass - Preminary - Intel
Technical Product Specification for Canoe Pass - Preminary - Intel
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<strong>Intel</strong> ® Server Board S2600CP and Server System P4000CP TPS <strong>Intel</strong>® Server Board S2600CP Functional Architecture<br />
4.3.11 Advanced Programmable Interrupt Controller (APIC)<br />
In addition to the standard ISA compatible Programmable Interrupt controller (PIC) described in<br />
the previous section, the Patsburg incorporates the Advanced Programmable Interrupt<br />
Controller (APIC).<br />
4.3.12 Universal Serial Bus (USB) Controllers<br />
The Patsburg chipset has up to two Enhanced Host Controller Interface (EHCI) host controllers<br />
that support USB high-speed signaling. High-speed USB 2.0 allows data transfers up to 480<br />
Mb/s which is 40 times faster than full-speed USB. The Patsburg chipset supports up to<br />
fourteen USB 2.0 ports. All fourteen ports are high-speed, full-speed, and low-speed capable.<br />
4.3.13 Gigabit Ethernet Controller<br />
The Gigabit Ethernet Controller provides a system interface using a PCI function. The controller<br />
provides a full memory-mapped or IO mapped interface along with a 64 bit address master<br />
support <strong>for</strong> systems using more than 4 GB of physical memory and DMA (Direct Memory<br />
Addressing) mechanisms <strong>for</strong> high per<strong>for</strong>mance data transfers. Its bus master capabilities enable<br />
the component to process high-level commands and per<strong>for</strong>m multiple operations; this lowers<br />
processor utilization by off-loading communication tasks from the processor. Two large<br />
configurable transmit and receive FIFOs (up to 20 KB each) help prevent data underruns and<br />
overruns while waiting <strong>for</strong> bus accesses. This enables the integrated LAN controller to transmit<br />
data with minimum interframe spacing (IFS).<br />
The LAN controller can operate at multiple speeds (10/100/1000 MB/s) and in either full duplex<br />
or half duplex mode. In full duplex mode the LAN controller adheres with the IEEE 802.3x Flow<br />
Control <strong>Specification</strong>. Half duplex per<strong>for</strong>mance is enhanced by a proprietary collision reduction<br />
mechanism.<br />
4.3.14 RTC<br />
The Patsburg chipset contains a real-time clock with 256 bytes of battery-backed RAM. The<br />
real-time clock per<strong>for</strong>ms two key functions: keeping track of the time of day and storing system<br />
data. The RTC operates on a 32.768 KHz crystal and a 3 V battery.<br />
4.3.15 GPIO<br />
Various general purpose inputs and outputs are provided <strong>for</strong> custom system design. The<br />
number of inputs and outputs varies depending on the Patsburg chipset configuration.<br />
4.3.16 Enhanced Power Management<br />
The Patsburg chipset’s power management functions include enhanced clock control and<br />
various low-power (suspend) states (<strong>for</strong> example, Suspend-to-RAM and Suspend-to-Disk). A<br />
hardware-based thermal management circuit permits software-independent entrance to lowpower<br />
states. The Patsburg chipset contains full support <strong>for</strong> the Advanced Configuration and<br />
Power Interface (ACPI) <strong>Specification</strong>, Revision 4.0a.<br />
4.3.17 Manageability<br />
The Patsburg chipset integrates several functions designed to manage the system and lower<br />
the total cost of ownership (TCO) of the system. These system management functions are<br />
designed to report errors, diagnose the system, and recover from system lockups without the<br />
aid of an external microcontroller.<br />
Revision 0.8 <strong>Intel</strong> Confidential<br />
<strong>Intel</strong> order number G26942-003<br />
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